i.MX ProcessorsのトピックI.MX8QXP IBIS model.

I.MX8QXP IBIS model.

yoshihiro_takah — Tue, 29 Sep 2020 09:13:35 GMT

Hello,

I have a question about DDR3 part of I.MX8QXP IBIS model: imx8qxp_21x21_v204.ibs.

Q1.

I can't find description of "Package model", and "Define Package Model" which asign the package mode. Is there the information about "Package model" of IBIS model?

Q2.

I find the information of delay on page 42 of the "Hardware Developer Guide". Hardware Developper Guide" said "If delay skew "± 2ps" is supported, the delay for each pin in the PKG is ignored". So the delay for each pin is enough short , are there nessesary to think about "Package model" information ?

Thanks
Takahashi

Re: I.MX8QXP IBIS model.

Yuri — Mon, 05 Oct 2020 06:14:12 GMT

@yoshihiro_takah
Hello,

There is no the package model in the i.MX8X IBIS file.
Customers can use recommendations of i.MX8 QM/i.MX8 QXP Hardware Developer’s Guide,
in particular, section 7.6.1 (DRAM SI simulation guide).

https://www.nxp.com/webapp/Download?colCode=IMX8HWDG

Regards,
Yuri.

Re: I.MX8QXP IBIS model.

yoshihiro_takah — Tue, 06 Oct 2020 02:04:13 GMT

Thanks for your reply.

I understood that there are no package model in the i.MX8X IBIS file.

And I also want to know why there aren't package model in the iMX8X IBIS file.

Am I correct in understanding that delay skew are enough short and the delay for each pin in the PKG is ignored,so there are no package model of the i.MX8X IBIS file?

Best regard,

Yoshihiro.

Re: I.MX8QXP IBIS model.

Yuri — Tue, 06 Oct 2020 05:28:26 GMT

@yoshihiro_takah
Hello,

generally Your understanding is correct. Only DDR Package Conductor Lengths, provided
in the HDG, should be considered; for the other signals - the delay skew may be considered as
short.

Regards,
Yuri.