<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: imx8m mini with FLEXSPI in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-with-FLEXSPI/m-p/1158177#M162412</link>
    <description>&lt;P&gt;Hi&amp;nbsp;Abdellahkafi&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;regarding "time needed&amp;nbsp; to access&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;peripherals registers" - general answer&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;this is caused by bus arbiters, like NIC301 in i.MX6 processors, similar modules&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;are used in i.MX8 processors. Good latency description can be found in&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;sect.3.4 NIC transfer latency AN4947 "Understanding Vybrid Architecture"&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN4947.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN4947.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;So 150 ns for toggling GPIO by directly writing to the dedicated register may be&lt;/P&gt;
&lt;P&gt;considered&amp;nbsp;as normal.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
    <pubDate>Thu, 24 Sep 2020 00:50:45 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2020-09-24T00:50:45Z</dc:date>
    <item>
      <title>imx8m mini with FLEXSPI</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-with-FLEXSPI/m-p/1157784#M162384</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I want to use FlexSPI on the imx8m mini. It seems working but when i write bock of data ,i have noticed that writing data to&amp;nbsp;FlexSPI&amp;nbsp; TX IP FIFO is really slow, in my case writing 32 bytes needs around 4 us, also when i try to toggle GPIO by directly writing to the dedicated register takes long time (150 ns , the assembly code looks fine with only 3 instructions) which seems too slow, i tried also to fire a timer interrupt to be sure that clock/pll configurations are fine.&amp;nbsp;&lt;/P&gt;&lt;P&gt;All the tests are made on the M4 core and the code is based on the&amp;nbsp;SDK_2.8.2_EVKB-IMXRT1050; so i am wondering what is the time needed&amp;nbsp; to access &lt;SPAN&gt;peripherals registers.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 23 Sep 2020 19:58:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-with-FLEXSPI/m-p/1157784#M162384</guid>
      <dc:creator>Abdellahkafi</dc:creator>
      <dc:date>2020-09-23T19:58:58Z</dc:date>
    </item>
    <item>
      <title>Re: imx8m mini with FLEXSPI</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-with-FLEXSPI/m-p/1158177#M162412</link>
      <description>&lt;P&gt;Hi&amp;nbsp;Abdellahkafi&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;regarding "time needed&amp;nbsp; to access&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;peripherals registers" - general answer&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;this is caused by bus arbiters, like NIC301 in i.MX6 processors, similar modules&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;are used in i.MX8 processors. Good latency description can be found in&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;sect.3.4 NIC transfer latency AN4947 "Understanding Vybrid Architecture"&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN4947.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN4947.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;So 150 ns for toggling GPIO by directly writing to the dedicated register may be&lt;/P&gt;
&lt;P&gt;considered&amp;nbsp;as normal.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Thu, 24 Sep 2020 00:50:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-with-FLEXSPI/m-p/1158177#M162412</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-09-24T00:50:45Z</dc:date>
    </item>
    <item>
      <title>Re: imx8m mini with FLEXSPI</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-with-FLEXSPI/m-p/1158481#M162455</link>
      <description>&lt;P&gt;Thanks for your fast answer&lt;/P&gt;&lt;P&gt;Concerning FlexSPI, writing 32 bytes (eight 32-bits words ) to IP TX-FIFO, I changed the watermark level to 3 in my case and the filling time is around 2.5 us, is it expected and is there any way to make it faster without using DMA&lt;SPAN&gt;?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Best regards&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 24 Sep 2020 08:56:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-with-FLEXSPI/m-p/1158481#M162455</guid>
      <dc:creator>Abdellahkafi</dc:creator>
      <dc:date>2020-09-24T08:56:58Z</dc:date>
    </item>
  </channel>
</rss>

