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    <title>topic Slow HAB verification in SPL in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Slow-HAB-verification-in-SPL/m-p/1150923#M161500</link>
    <description>&lt;P&gt;Hi, I am working in a project where the boot up time is a critical issue. The project is built around IMX6DL and we are using HAB. The boot sequence is SPL-&amp;gt;u-boot-&amp;gt;FIT-image, u-boot version is fslc-2018.11. We experience that the image verification of the u-boot image from the SPL is very slow. Around 800ms only for the function call to&amp;nbsp;imx_hab_authenticate_image(). The verification of the FIT image from u-boot is much faster, almost 500ms faster.&lt;/P&gt;&lt;P&gt;According to the reference manual the MMU and caches are enabled i ROM for faster image verification but then disabled again after the authentication of the SPL image. The MMU and caches seems to be enabled again in the u-boot code which meas these will be disable when the SPL is running.&lt;/P&gt;&lt;P&gt;Can this be the cause of the slow u-boot verification in SPL? Do any one knows how to enable the MMU and caches in SPL code or can point me to a available patch?&lt;/P&gt;&lt;P&gt;Best regards,&lt;BR /&gt;Per Örbäck&lt;/P&gt;</description>
    <pubDate>Wed, 09 Sep 2020 07:44:54 GMT</pubDate>
    <dc:creator>per_orback</dc:creator>
    <dc:date>2020-09-09T07:44:54Z</dc:date>
    <item>
      <title>Slow HAB verification in SPL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Slow-HAB-verification-in-SPL/m-p/1150923#M161500</link>
      <description>&lt;P&gt;Hi, I am working in a project where the boot up time is a critical issue. The project is built around IMX6DL and we are using HAB. The boot sequence is SPL-&amp;gt;u-boot-&amp;gt;FIT-image, u-boot version is fslc-2018.11. We experience that the image verification of the u-boot image from the SPL is very slow. Around 800ms only for the function call to&amp;nbsp;imx_hab_authenticate_image(). The verification of the FIT image from u-boot is much faster, almost 500ms faster.&lt;/P&gt;&lt;P&gt;According to the reference manual the MMU and caches are enabled i ROM for faster image verification but then disabled again after the authentication of the SPL image. The MMU and caches seems to be enabled again in the u-boot code which meas these will be disable when the SPL is running.&lt;/P&gt;&lt;P&gt;Can this be the cause of the slow u-boot verification in SPL? Do any one knows how to enable the MMU and caches in SPL code or can point me to a available patch?&lt;/P&gt;&lt;P&gt;Best regards,&lt;BR /&gt;Per Örbäck&lt;/P&gt;</description>
      <pubDate>Wed, 09 Sep 2020 07:44:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Slow-HAB-verification-in-SPL/m-p/1150923#M161500</guid>
      <dc:creator>per_orback</dc:creator>
      <dc:date>2020-09-09T07:44:54Z</dc:date>
    </item>
    <item>
      <title>Re: Slow HAB verification in SPL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Slow-HAB-verification-in-SPL/m-p/1151279#M161557</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/61827"&gt;@per_orback&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; This is correct - t&lt;SPAN style="color: #333f48; font-family: Arial, sans-serif; font-size: 16px; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 300; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial; display: inline !important; float: none;"&gt;he boot&amp;nbsp; ROM enables caches to authenticate images, and then disables prior &lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #333f48; font-family: Arial, sans-serif; font-size: 16px; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 300; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial; display: inline !important; float: none;"&gt;to jumping to the loaded image. The intent is MMU/Caches to be disabled when the loaded image&lt;BR /&gt;takes control. This ensures the user code is responsible for configuring its environment.&lt;BR /&gt;&amp;nbsp; NXP Linux BSP does not use SPL for i.MX6. For i.MX 6 and i.MX 7, the boot image uses only&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #333f48; font-family: Arial, sans-serif; font-size: 16px; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 300; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial; display: inline !important; float: none;"&gt; the U-Boot bootloader.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
      <pubDate>Thu, 10 Sep 2020 04:57:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Slow-HAB-verification-in-SPL/m-p/1151279#M161557</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2020-09-10T04:57:59Z</dc:date>
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