<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Configuring Display Interface For a new LCD(i.MX53). in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-Display-Interface-For-a-new-LCD-i-MX53/m-p/226170#M16089</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Recently, I'm trying to interface a Trully LCD. It's a 240x320(portrait) display, with RGB666 interface, VSYNC, HSYNC, PIXCLK and DE signals. Looking for references on Linux kernel(on arch files of the QSB board and SABRE), and reading IMX53 User Manual, I figured out that some pins of the DI module(DI0_PINxx) can act as VSYNC, HSYNC and DE, but I don't realize where in the BSP each generic pin is assigned with a specific function. Can someone help me?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For the record: on mx53_loco.c file, those pads are configured as sync pins:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE height="99" style="height: 80px; width: 250px;"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;MX53_PAD_DI0_PIN15__IPU_DI0_PIN15,&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;MX53_PAD_DI0_PIN2__IPU_DI0_PIN2,&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;MX53_PAD_DI0_PIN3__IPU_DI0_PIN3,&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;On QSB schematic, they are, respectively, DE, HSYNC and VSYNC. As these IPU pins are generics, I want to know where they are specifically configured.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ricardo Gurgel.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 23 Oct 2013 14:23:26 GMT</pubDate>
    <dc:creator>ricardo_ioct</dc:creator>
    <dc:date>2013-10-23T14:23:26Z</dc:date>
    <item>
      <title>Configuring Display Interface For a new LCD(i.MX53).</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-Display-Interface-For-a-new-LCD-i-MX53/m-p/226170#M16089</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, Community.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Recently, I'm trying to interface a Trully LCD. It's a 240x320(portrait) display, with RGB666 interface, VSYNC, HSYNC, PIXCLK and DE signals. Looking for references on Linux kernel(on arch files of the QSB board and SABRE), and reading IMX53 User Manual, I figured out that some pins of the DI module(DI0_PINxx) can act as VSYNC, HSYNC and DE, but I don't realize where in the BSP each generic pin is assigned with a specific function. Can someone help me?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For the record: on mx53_loco.c file, those pads are configured as sync pins:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE height="99" style="height: 80px; width: 250px;"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;MX53_PAD_DI0_PIN15__IPU_DI0_PIN15,&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;MX53_PAD_DI0_PIN2__IPU_DI0_PIN2,&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;&lt;/TD&gt;&lt;TD&gt;MX53_PAD_DI0_PIN3__IPU_DI0_PIN3,&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;On QSB schematic, they are, respectively, DE, HSYNC and VSYNC. As these IPU pins are generics, I want to know where they are specifically configured.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ricardo Gurgel.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 23 Oct 2013 14:23:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-Display-Interface-For-a-new-LCD-i-MX53/m-p/226170#M16089</guid>
      <dc:creator>ricardo_ioct</dc:creator>
      <dc:date>2013-10-23T14:23:26Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring Display Interface For a new LCD(i.MX53).</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-Display-Interface-For-a-new-LCD-i-MX53/m-p/226171#M16090</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;1. &lt;A href="http://cache.freescale.com/files/32bit/doc/user_guide/MX53UG.pdf"&gt;http://cache.freescale.com/files/32bit/doc/user_guide/MX53UG.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Please read the Chapter 18 for LCD porting details.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.&amp;nbsp; Different Display Configurations on i.MX35 Linux PDK&lt;/P&gt;&lt;P&gt;&lt;A href="http://cache.freescale.com/files/dsp/doc/app_note/AN3974.pdf"&gt;http://cache.freescale.com/files/dsp/doc/app_note/AN3974.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Although this is for i.MX35, the driving porting in Linux for i.MX53 is the same.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Nov 2013 02:51:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-Display-Interface-For-a-new-LCD-i-MX53/m-p/226171#M16090</guid>
      <dc:creator>jimmychan</dc:creator>
      <dc:date>2013-11-01T02:51:00Z</dc:date>
    </item>
  </channel>
</rss>

