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    <title>topic Re: MIPI-CSI2 PHY_CTRL register in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095957#M160551</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;we don't have such document for every bits description, as I mentioned, customer can refer to the current bsp source code, define these bits the same value as linux driver defines.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 21 May 2020 08:42:31 GMT</pubDate>
    <dc:creator>joanxie</dc:creator>
    <dc:date>2020-05-21T08:42:31Z</dc:date>
    <item>
      <title>MIPI-CSI2 PHY_CTRL register</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095954#M160548</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From&amp;nbsp;RM&amp;nbsp;IMX8DQXPRM.pdf (Rev.0):&lt;/P&gt;&lt;P&gt;RM does not have any description for MIPI-CSI2's PHY_CTRL register.&lt;/P&gt;&lt;P&gt;Also, Linux BSP's source code too.&lt;/P&gt;&lt;P&gt;Could you please explain us meaning of each bit fields?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Kazuma sasaki.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/106456iE7E00BD5FA8D02F6/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/106646iFD6DF97338EFFCED/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_3.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/106685iC6318FACDABE41B7/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_3.png" alt="pastedImage_3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/106727iCC6104A4D6564D9A/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 May 2020 01:51:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095954#M160548</guid>
      <dc:creator>Kazuma_Sasaki</dc:creator>
      <dc:date>2020-05-18T01:51:12Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI-CSI2 PHY_CTRL register</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095955#M160549</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;you can find the mipi driver defined this register, and I confirmed that customer don't need to change this&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/media/platform/imx8/mxc-mipi-csi2.c?h=imx_4.14.98_2.0.0_ga" title="https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/media/platform/imx8/mxc-mipi-csi2.c?h=imx_4.14.98_2.0.0_ga"&gt;mxc-mipi-csi2.c\imx8\platform\media\drivers - linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/media/platform/imx8/mxc-mipi-csi2.h?h=imx_4.14.98_2.0.0_ga" title="https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/media/platform/imx8/mxc-mipi-csi2.h?h=imx_4.14.98_2.0.0_ga"&gt;mxc-mipi-csi2.h\imx8\platform\media\drivers - linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 May 2020 07:57:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095955#M160549</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2020-05-20T07:57:12Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI-CSI2 PHY_CTRL register</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095956#M160550</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Joan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I appreciate your support.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to know the meaning of all bit fields in PHY_CTRL register for&amp;nbsp;porting mipi driver to RTOS.&amp;nbsp; &amp;nbsp;&lt;/P&gt;&lt;P&gt;Because, all bit fields have not mentioned in iMX8X reference manual.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Kazuma Sasaki.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 May 2020 09:23:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095956#M160550</guid>
      <dc:creator>Kazuma_Sasaki</dc:creator>
      <dc:date>2020-05-20T09:23:34Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI-CSI2 PHY_CTRL register</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095957#M160551</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;we don't have such document for every bits description, as I mentioned, customer can refer to the current bsp source code, define these bits the same value as linux driver defines.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 21 May 2020 08:42:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095957#M160551</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2020-05-21T08:42:31Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI-CSI2 PHY_CTRL register</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095958#M160552</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Joan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your feedback.&amp;nbsp;&lt;/P&gt;&lt;P&gt;We can not decide the setting value without bits description.&lt;/P&gt;&lt;P&gt;Could you please get these information from your expert team?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regars,&lt;/P&gt;&lt;P&gt;Kazuma Sasaki.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 May 2020 11:09:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095958#M160552</guid>
      <dc:creator>Kazuma_Sasaki</dc:creator>
      <dc:date>2020-05-25T11:09:58Z</dc:date>
    </item>
    <item>
      <title>Re: MIPI-CSI2 PHY_CTRL register</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095959#M160553</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I already consulted local expert team, they don't have such information either, and they don't think customer should care about this, they suggest customer set as bsp shows&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Jun 2020 08:09:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI2-PHY-CTRL-register/m-p/1095959#M160553</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2020-06-01T08:09:30Z</dc:date>
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