i.MX Processorsのトピックimx6ull spi slave mode txfifo error https://community.nxp.com/t5/i-MX-Processors/imx6ull-spi-slave-mode-txfifo-error/m-p/1095249#M160439 <HTML><HEAD></HEAD><BODY><P>I used imx6ull's ECSPI3 SS_0 channel and configured it in slave mode at a rate of 20Mhz;<BR />The BURST_LENGTH of ECSPI3 is set to 1599, that is, 50 words are transferred at a time, and the software will write 50 words to TXDATA continuously in each transfer.<BR />Master uses Linux 3.4.2, Master and slave's CPOL=CPHA=0.<BR />Part of the data received by the master in the experiment is shown in the following figure. Basically, garbled codes will be generated for every 50 data received.<BR />However, when I add 1ms delay to the loop of the master receiving data, the received data will be normal.<BR />I don't know what the reason is, is it because txdata's fifo needs 1ms to clear after it is full?<BR />Hope someone can answer my questions.</P><P><span class="lia-inline-image-display-wrapper" image-alt="InkedQQ图片20200518113236_LI.jpg"><img src="https://community.nxp.com/t5/image/serverpage/image-id/107381iF1991BC9C11BC858/image-size/large?v=v2&amp;px=999" role="button" title="InkedQQ图片20200518113236_LI.jpg" alt="InkedQQ图片20200518113236_LI.jpg" /></span></P></BODY></HTML> Mon, 18 May 2020 03:45:52 GMT 1486662470 2020-05-18T03:45:52Z imx6ull spi slave mode txfifo error https://community.nxp.com/t5/i-MX-Processors/imx6ull-spi-slave-mode-txfifo-error/m-p/1095249#M160439 <HTML><HEAD></HEAD><BODY><P>I used imx6ull's ECSPI3 SS_0 channel and configured it in slave mode at a rate of 20Mhz;<BR />The BURST_LENGTH of ECSPI3 is set to 1599, that is, 50 words are transferred at a time, and the software will write 50 words to TXDATA continuously in each transfer.<BR />Master uses Linux 3.4.2, Master and slave's CPOL=CPHA=0.<BR />Part of the data received by the master in the experiment is shown in the following figure. Basically, garbled codes will be generated for every 50 data received.<BR />However, when I add 1ms delay to the loop of the master receiving data, the received data will be normal.<BR />I don't know what the reason is, is it because txdata's fifo needs 1ms to clear after it is full?<BR />Hope someone can answer my questions.</P><P><span class="lia-inline-image-display-wrapper" image-alt="InkedQQ图片20200518113236_LI.jpg"><img src="https://community.nxp.com/t5/image/serverpage/image-id/107381iF1991BC9C11BC858/image-size/large?v=v2&amp;px=999" role="button" title="InkedQQ图片20200518113236_LI.jpg" alt="InkedQQ图片20200518113236_LI.jpg" /></span></P></BODY></HTML> Mon, 18 May 2020 03:45:52 GMT https://community.nxp.com/t5/i-MX-Processors/imx6ull-spi-slave-mode-txfifo-error/m-p/1095249#M160439 1486662470 2020-05-18T03:45:52Z