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    <title>topic iMX8X SCU reset reason in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX8X-SCU-reset-reason/m-p/1093648#M160227</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We can get reset reason via SCFW API (sc_pm_reset_reason).&lt;/P&gt;&lt;P&gt;SCFW&amp;nbsp; API manual defined following reasons.&lt;/P&gt;&lt;P&gt;We&amp;nbsp;would like to know the following reasons are settled by what conditions.&lt;/P&gt;&lt;P&gt;Could you please elaborate each by each?&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are under considering of abnormal operations. so these information need to our design.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From sc_fw_api_qx_b0.pdf ver 1.21&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/115630iB456E3DBA9009184/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Kazuma Sasaki.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 13 Jul 2020 15:23:27 GMT</pubDate>
    <dc:creator>Kazuma_Sasaki</dc:creator>
    <dc:date>2020-07-13T15:23:27Z</dc:date>
    <item>
      <title>iMX8X SCU reset reason</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8X-SCU-reset-reason/m-p/1093648#M160227</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We can get reset reason via SCFW API (sc_pm_reset_reason).&lt;/P&gt;&lt;P&gt;SCFW&amp;nbsp; API manual defined following reasons.&lt;/P&gt;&lt;P&gt;We&amp;nbsp;would like to know the following reasons are settled by what conditions.&lt;/P&gt;&lt;P&gt;Could you please elaborate each by each?&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are under considering of abnormal operations. so these information need to our design.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From sc_fw_api_qx_b0.pdf ver 1.21&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/115630iB456E3DBA9009184/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Kazuma Sasaki.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 Jul 2020 15:23:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8X-SCU-reset-reason/m-p/1093648#M160227</guid>
      <dc:creator>Kazuma_Sasaki</dc:creator>
      <dc:date>2020-07-13T15:23:27Z</dc:date>
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    <item>
      <title>Re: iMX8X SCU reset reason</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8X-SCU-reset-reason/m-p/1093649#M160228</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please find a summary of reset events:&lt;/P&gt;&lt;UL type="disc"&gt;&lt;LI&gt;SC_PM_RESET_REASON_POR - is default if no other reason is reported.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_WDOG - expiration of a virtual watchdog.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_SECO - reset requested by SECO FW.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_SCFW_FAULT - SW fault detected by SCFW.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_V2X_DEBUG - request to transition V2X to debug mode which requires a reset.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_SNVS - SNVS security monitor has entered hard fail state.&amp;nbsp; Refer to the SNVS documentation in the Security Reference Manual for more details on the causes for entering hard fail state.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_MSI - Reset of SCU control bus (MSI bus) is requested after being locked by the SCU ROM or SCFW.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_TEMP - Temperature sensor panic threshold&amp;nbsp;has been&amp;nbsp;reached.&amp;nbsp; Currently only the SCU temperature sensor can trigger this panic event.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_UECC - SCU TCM has encountered an unrecoverable ECC error.&amp;nbsp; This event will generate an NMI to the SCU and the SCFW will call board_fault().&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_LOCKUP - SCU CM4 core has encountered a LOCKUP event.&amp;nbsp; Refer to the ARMv7m architecture reference manual for conditions that can cause a CM4 LOCKUP.&amp;nbsp; This event will generate an NMI to the SCU and the SCFW will call board_fault().&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_RESET_REASON_JTAG - This reset reason is reserved for reporting a system reset request via JTAG.&amp;nbsp; Currently not used.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_SCFW_WDOG - SCU encountered WDOG reset event during execution of SCFW.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_ROM_WDOG - SCU encountered WDOG reset event during execution of SCU ROM.&lt;/LI&gt;&lt;LI&gt;SC_PM_RESET_REASON_SW - SCU has programmatically requested a reset using the CM4 SYSRESETREQ bit of the AIRCR.&amp;nbsp; SCFW calls NVIC_SystemReset to request this type of reset.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hope this helps,&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Aldo.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Jul 2020 19:48:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8X-SCU-reset-reason/m-p/1093649#M160228</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2020-07-23T19:48:39Z</dc:date>
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