i.MX ProcessorsのトピックRe: i.mx6 Deep Sleep Power Connections https://community.nxp.com/t5/i-MX-Processors/i-mx6-Deep-Sleep-Power-Connections/m-p/1086197#M159251 <HTML><HEAD></HEAD><BODY><P>Hi David</P><P></P><P>&gt;<SPAN style="font-size: 11.0pt;">if NVCC_RGMII and NVCC_ENET are connected to VDDHIGH_CAP, could that cause the weak linear regulator enabled via &gt;bit 18 (enable_weak_linreg) of the PMU_REG_2P5n to fail to turn on in DSM (Deep Sleep Mode) or to drop to ~0V?</SPAN></P><P></P><P>in general yes, behaviour may be unpredictable as <SPAN style="font-size: 11.0pt;">VDDHIGH_CAP</SPAN> usage is restricted as described below</P><P></P><P><span class="lia-inline-image-display-wrapper"><img src="https://community.nxp.com/t5/image/serverpage/image-id/108536i540B32EE5FF6D04E/image-size/large?v=v2&amp;px=999" title="pastedImage_1.jpg" alt="pastedImage_1.jpg" /></span></P><P></P><P></P><P><A href="https://www.nxp.com/webapp/Download?colCode=IMX6DQ6SDLHDG" target="_blank"><STRONG>IMX6DQ6SDLHDG, Hardware Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors </STRONG></A></P><P></P><P></P><P>Best regards<BR />igor<BR />-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Fri, 29 May 2020 05:22:07 GMT igorpadykov 2020-05-29T05:22:07Z i.mx6 Deep Sleep Power Connections https://community.nxp.com/t5/i-MX-Processors/i-mx6-Deep-Sleep-Power-Connections/m-p/1086196#M159250 <HTML><HEAD></HEAD><BODY><P>We are attempting to implement deep sleep on our custom i.mx6 dual application.&nbsp; Note that we are not using the PF0100.&nbsp; Our question is,&nbsp;<SPAN style="font-size: 11.0pt;">if NVCC_RGMII and NVCC_ENET are connected to VDDHIGH_CAP, could that cause the weak linear regulator enabled via bit 18 (enable_weak_linreg) of the PMU_REG_2P5n to fail to turn on in DSM (Deep Sleep Mode) or to drop to ~0V?</SPAN></P></BODY></HTML> Thu, 28 May 2020 12:11:56 GMT https://community.nxp.com/t5/i-MX-Processors/i-mx6-Deep-Sleep-Power-Connections/m-p/1086196#M159250 dmatthews 2020-05-28T12:11:56Z Re: i.mx6 Deep Sleep Power Connections https://community.nxp.com/t5/i-MX-Processors/i-mx6-Deep-Sleep-Power-Connections/m-p/1086197#M159251 <HTML><HEAD></HEAD><BODY><P>Hi David</P><P></P><P>&gt;<SPAN style="font-size: 11.0pt;">if NVCC_RGMII and NVCC_ENET are connected to VDDHIGH_CAP, could that cause the weak linear regulator enabled via &gt;bit 18 (enable_weak_linreg) of the PMU_REG_2P5n to fail to turn on in DSM (Deep Sleep Mode) or to drop to ~0V?</SPAN></P><P></P><P>in general yes, behaviour may be unpredictable as <SPAN style="font-size: 11.0pt;">VDDHIGH_CAP</SPAN> usage is restricted as described below</P><P></P><P><span class="lia-inline-image-display-wrapper"><img src="https://community.nxp.com/t5/image/serverpage/image-id/108536i540B32EE5FF6D04E/image-size/large?v=v2&amp;px=999" title="pastedImage_1.jpg" alt="pastedImage_1.jpg" /></span></P><P></P><P></P><P><A href="https://www.nxp.com/webapp/Download?colCode=IMX6DQ6SDLHDG" target="_blank"><STRONG>IMX6DQ6SDLHDG, Hardware Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors </STRONG></A></P><P></P><P></P><P>Best regards<BR />igor<BR />-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Fri, 29 May 2020 05:22:07 GMT https://community.nxp.com/t5/i-MX-Processors/i-mx6-Deep-Sleep-Power-Connections/m-p/1086197#M159251 igorpadykov 2020-05-29T05:22:07Z