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    <title>i.MX ProcessorsのトピックRe: Correct register value for RAW12 data reception</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Correct-register-value-for-RAW12-data-reception/m-p/1085890#M159208</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;did you change anything in the bsp? try to add the source code as below in your bsp:&lt;/P&gt;&lt;P&gt;&amp;nbsp;add&amp;nbsp; #define BIT_MIPI_DATA_FORMAT_RAW12&amp;nbsp;&amp;nbsp; &amp;nbsp;(0x2C &amp;lt;&amp;lt; 25 ) , and&lt;/P&gt;&lt;P&gt;add this code to the "struct mx6s_fmt formats"&lt;/P&gt;&lt;P&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .name&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;= "RAWRGB12 (SGRBG12)",&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .fourcc&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;= V4L2_PIX_FMT_SGRBG12,&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .pixelformat&amp;nbsp;&amp;nbsp; &amp;nbsp;= V4L2_PIX_FMT_SGRBG12,&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .mbus_code&amp;nbsp;&amp;nbsp; &amp;nbsp;= MEDIA_BUS_FMT_SRGGB12_1X12,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .bpp&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;= 1,&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static int mx6s_configure_csi(struct mx6s_csi_dev *csi_dev)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;switch (csi_dev-&amp;gt;fmt-&amp;gt;pixelformat) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_YUV32:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_SBGGR8:&lt;BR /&gt;+&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_SGRBG12:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;width = pix-&amp;gt;width;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;break;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_UYVY:&lt;BR /&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;static int mx6s_configure_csi(struct mx6s_csi_dev *csi_dev)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_SBGGR8:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;cr18 |= BIT_MIPI_DATA_FORMAT_RAW8;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;break;&lt;BR /&gt;+&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_SGRBG12:&lt;BR /&gt;+&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;cr18 |= BIT_MIPI_DATA_FORMAT_RAW12;&lt;BR /&gt;+&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;break;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;default:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;pr_debug("&amp;nbsp;&amp;nbsp; fmt not supported\n");&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;return -EINVAL;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pls set the bsp correct firstly&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 01 Jun 2020 08:50:04 GMT</pubDate>
    <dc:creator>joanxie</dc:creator>
    <dc:date>2020-06-01T08:50:04Z</dc:date>
    <item>
      <title>Correct register value for RAW12 data reception</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Correct-register-value-for-RAW12-data-reception/m-p/1085889#M159207</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;BR /&gt;I want to receive RAW12 image data with MIPI-CSI and set the data to FB1 and FB2 with DMA of CSI Bridge.&lt;BR /&gt;However, I don't know the proper register settings for MIPI-CSI and CSI Bridge for RAW12.&lt;/P&gt;&lt;P&gt;1.TWO_8BIT_SENSOR&lt;BR /&gt;When TWO_8BIT_SENSOR is 0, it doesn't look like an image at all, but when TWO_8BIT_SENSOR is 1, it looks like an image.&lt;BR /&gt;(debayer is required separately)&lt;BR /&gt;Is 1 the right choice for TWO_8BIT_SENSOR in a RAW12 receiving environment?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.BASEADDR_CHHANGE_ERROR&lt;BR /&gt;When receiving RAW12 and setting DMA1's FB1 and FB2 to be switched as follows, BASEADDR_CHHANGE_ERROR will occur and the data set will not be completed in FB1 and FB2.&lt;BR /&gt;CSI_CSICR18:BASEADDR_SWITCH_EN 1&lt;/P&gt;&lt;P&gt;With the following settings, the data will be set in FB1 and FB2, but the images cannot be synchronized well.&lt;BR /&gt;CSI_CSICR18:BASEADDR_SWITCH_EN 0&lt;/P&gt;&lt;P&gt;I would like to know if there is a missing setting for the above problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Since we are trying to acquire VGA size images with RAW12, we have made the following settings.&lt;BR /&gt;CSI_CSIIMAG_PARA:IMAGE_WIDTH　640&lt;BR /&gt;CSI_CSIIMAG_PARA:IMAGE_HEIGHT　480&lt;BR /&gt;CSI_CSICR18:MIPI_DATA_FORMAT　RAW12(0x2C)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;BR /&gt;Tetsuya.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 May 2020 07:47:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Correct-register-value-for-RAW12-data-reception/m-p/1085889#M159207</guid>
      <dc:creator>t-sugiyama</dc:creator>
      <dc:date>2020-05-28T07:47:59Z</dc:date>
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    <item>
      <title>Re: Correct register value for RAW12 data reception</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Correct-register-value-for-RAW12-data-reception/m-p/1085890#M159208</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;did you change anything in the bsp? try to add the source code as below in your bsp:&lt;/P&gt;&lt;P&gt;&amp;nbsp;add&amp;nbsp; #define BIT_MIPI_DATA_FORMAT_RAW12&amp;nbsp;&amp;nbsp; &amp;nbsp;(0x2C &amp;lt;&amp;lt; 25 ) , and&lt;/P&gt;&lt;P&gt;add this code to the "struct mx6s_fmt formats"&lt;/P&gt;&lt;P&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .name&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;= "RAWRGB12 (SGRBG12)",&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .fourcc&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;= V4L2_PIX_FMT_SGRBG12,&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .pixelformat&amp;nbsp;&amp;nbsp; &amp;nbsp;= V4L2_PIX_FMT_SGRBG12,&lt;BR /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .mbus_code&amp;nbsp;&amp;nbsp; &amp;nbsp;= MEDIA_BUS_FMT_SRGGB12_1X12,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; .bpp&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;= 1,&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static int mx6s_configure_csi(struct mx6s_csi_dev *csi_dev)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;switch (csi_dev-&amp;gt;fmt-&amp;gt;pixelformat) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_YUV32:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_SBGGR8:&lt;BR /&gt;+&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_SGRBG12:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;width = pix-&amp;gt;width;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;break;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_UYVY:&lt;BR /&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;static int mx6s_configure_csi(struct mx6s_csi_dev *csi_dev)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_SBGGR8:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;cr18 |= BIT_MIPI_DATA_FORMAT_RAW8;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;break;&lt;BR /&gt;+&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;case V4L2_PIX_FMT_SGRBG12:&lt;BR /&gt;+&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;cr18 |= BIT_MIPI_DATA_FORMAT_RAW12;&lt;BR /&gt;+&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;break;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;default:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;pr_debug("&amp;nbsp;&amp;nbsp; fmt not supported\n");&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;return -EINVAL;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pls set the bsp correct firstly&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Jun 2020 08:50:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Correct-register-value-for-RAW12-data-reception/m-p/1085890#M159208</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2020-06-01T08:50:04Z</dc:date>
    </item>
    <item>
      <title>Re: Correct register value for RAW12 data reception</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Correct-register-value-for-RAW12-data-reception/m-p/1085891#M159209</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello joan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for the answer.&lt;BR /&gt;I am trying to control MIPI-CSI with cortex-M4 of i.MX8Mmini to get RAW12 format image from camera.&lt;BR /&gt;However, when I control to get the RAW12 data, I am missing one pixel for every two pixels I get.&lt;BR /&gt;So I'm looking into the correct acquisition method of RAW12.&lt;BR /&gt;The reference manual does not contain much information on how to handle images in RAW12 format, so I believe that if the correct register value is known, investigation will proceed.&lt;BR /&gt;The source code information given to me by Joan is a hint to find the register settings for RAW12 format.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;Tetsuya&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Jun 2020 14:07:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Correct-register-value-for-RAW12-data-reception/m-p/1085891#M159209</guid>
      <dc:creator>t-sugiyama</dc:creator>
      <dc:date>2020-06-01T14:07:54Z</dc:date>
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