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    <title>topic Re: mipi-csi access issue in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/mipi-csi-access-issue/m-p/1082234#M158785</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi igor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your consultation.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tried setting RDC on cortex-M4.&lt;BR /&gt;When setting No Read Access except Domain 1 in the register RDC_PDAP34 (CSI), a kernel panic occurred during IMX Linux startup and only IMX Linux stopped.&lt;BR /&gt;* (UW) 0x303D0488 = 0x0000000c;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I expect IMX Linux to try to access the CSI.&lt;BR /&gt;In this case, do I need to check the kernel source code as well as edit the device tree?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;Tetsuya&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 28 Apr 2020 01:30:56 GMT</pubDate>
    <dc:creator>t-sugiyama</dc:creator>
    <dc:date>2020-04-28T01:30:56Z</dc:date>
    <item>
      <title>mipi-csi access issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/mipi-csi-access-issue/m-p/1082232#M158783</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;BR /&gt;I understand the lack of performance of iMX8Mmini's cortex-M4 and dare to access MIPI-CSI and CSI Bridge with cortex-M4.&lt;BR /&gt;I actually made a program to access MIPI-CSI and CSI Bridge registers with cortex-M4, and confirmed that the camera data was acquired.&lt;BR /&gt;However, the process succeeds when I run only the cortex-M4 program from u-boot, but when IMX-Linux is run in parallel, when the cortex-M4 program accesses the MIPI-CSI register. It freezes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I intend to edit the device tree of IMX-Linux and delete the nodes related to MIPI-CSI and CSI Bridge. Is it still insufficient?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Or is there a mechanism that the register access from the cortex-M4 cannot be done when the cortex-A53 operates as the SoC specifications?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;IMX-Linux: Rev. L4.14.98_2.3.0, 22 January 2020&lt;BR /&gt;Board: 8MMINILPD4-EVK&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Attach the used device tree.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;BR /&gt;Tetsuya.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 Apr 2020 05:33:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/mipi-csi-access-issue/m-p/1082232#M158783</guid>
      <dc:creator>t-sugiyama</dc:creator>
      <dc:date>2020-04-27T05:33:27Z</dc:date>
    </item>
    <item>
      <title>Re: mipi-csi access issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/mipi-csi-access-issue/m-p/1082233#M158784</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tetsuya&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;I intend to edit the device tree of IMX-Linux and delete the nodes related to&lt;/P&gt;&lt;P&gt;&amp;gt;MIPI-CSI and CSI Bridge. Is it still insufficient?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I believe it is sufficient.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;gt;Or is there a mechanism that the register access from the cortex-M4 cannot be&lt;/P&gt;&lt;P&gt;&amp;gt;done when the cortex-A53 operates as the SoC specifications?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;such mechanism is provided using RDC, it is described in sect.3.2 Resource Domain Controller (RDC)&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX8MMRM" target="_blank"&gt;&lt;STRONG&gt;i.MX 8M Mini Applications Processor Reference Manual&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 Apr 2020 10:38:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/mipi-csi-access-issue/m-p/1082233#M158784</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-04-27T10:38:51Z</dc:date>
    </item>
    <item>
      <title>Re: mipi-csi access issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/mipi-csi-access-issue/m-p/1082234#M158785</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi igor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your consultation.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tried setting RDC on cortex-M4.&lt;BR /&gt;When setting No Read Access except Domain 1 in the register RDC_PDAP34 (CSI), a kernel panic occurred during IMX Linux startup and only IMX Linux stopped.&lt;BR /&gt;* (UW) 0x303D0488 = 0x0000000c;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I expect IMX Linux to try to access the CSI.&lt;BR /&gt;In this case, do I need to check the kernel source code as well as edit the device tree?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;Tetsuya&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 28 Apr 2020 01:30:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/mipi-csi-access-issue/m-p/1082234#M158785</guid>
      <dc:creator>t-sugiyama</dc:creator>
      <dc:date>2020-04-28T01:30:56Z</dc:date>
    </item>
    <item>
      <title>Re: mipi-csi access issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/mipi-csi-access-issue/m-p/1082235#M158786</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tetsuya&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;also one can check rdc configuration in&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/imx-atf/tree/plat/imx/imx8mm/imx8mm_bl31_setup.c?h=imx_4.14.98_2.3.0" title="https://source.codeaurora.org/external/imx/imx-atf/tree/plat/imx/imx8mm/imx8mm_bl31_setup.c?h=imx_4.14.98_2.3.0"&gt;imx8mm_bl31_setup.c\imx8mm\imx\plat - imx-atf - i.MX ARM Trusted firmware&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 28 Apr 2020 07:06:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/mipi-csi-access-issue/m-p/1082235#M158786</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-04-28T07:06:45Z</dc:date>
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