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<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: Interrupt Input boots up as Output in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071473#M157371</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;it seems I have found the cause of the problem:&lt;/P&gt;&lt;P&gt;My Bootloader configures this pin as Output with value '0'.&lt;/P&gt;&lt;P&gt;What I don't get is: why is Linux/Devicetree not able to correct this setting?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 23 Jun 2020 07:19:37 GMT</pubDate>
    <dc:creator>steffendoster</dc:creator>
    <dc:date>2020-06-23T07:19:37Z</dc:date>
    <item>
      <title>Interrupt Input boots up as Output</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071467#M157365</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a very strange behavior on an Interrupt Input. The whole story:&lt;/P&gt;&lt;P&gt;I'm running Linux on an i.MX6 Solo Processor on a custom Board. It is connected to a ti-WLAN module WL1837 via SD-Interface.&lt;/P&gt;&lt;P&gt;To operate this module it is necessary to have an interrupt input comming from the module.&lt;/P&gt;&lt;P&gt;I already implemented this on another custom board and it works perfectly. The difference between the two boards are:&lt;/P&gt;&lt;P&gt;- The SD-Interfaces are different (SD2 and SD4)&lt;/P&gt;&lt;P&gt;- The Interrupt Pin is different&lt;/P&gt;&lt;P&gt;- The board I now want to bring up needs a levelshifter because WL1837 Interface is 1.8V and the IOs of the i.MX6 on this board needs to be operated on 3.3V.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I derived the Devicetree-Part for WLAN of the board from the successful implementation of the other board.&lt;/P&gt;&lt;P&gt;But it doesn't work. On bootup there are plenty error messages that the Kernel can't get the module to work.&lt;/P&gt;&lt;P&gt;(on Monday I will provide detailed Error-Messages and Devicetree codes)&lt;/P&gt;&lt;P&gt;After long research I found the failure:&lt;BR /&gt;The Interrupt pin on i.MX6 seems to be configured as Output Pin with '0' assigned.&lt;/P&gt;&lt;P&gt;When I switch it to Input (by the old fashioned way: echo gpio-number to export and setting direction in this gpio) I can bring up the WLAN-module perfectly. Then everything works like it has to.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The problematic Pin is NANDF_CS3 configured as GPIO6_IO16 thus it is linux gpio 176.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Why does Linux configure this Interrupt-Input as Output? How can this be possible? I checked and checked again my IO-Muxing and the other configurations in Devicetree but didn't find an error yet. Can you give me any hint or help?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;On Monday I will provide more information like devicetree and error messages. Just say what you need to help me.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have now attached parts of my devicetree. My DT is seperated in several files sorted by bus/interfaces or functions.&lt;/P&gt;&lt;P&gt;The base.dtsi represents my base system with thins that nearly never change and where everything else is attached to.&lt;/P&gt;&lt;P&gt;I think iomux.dtsi and usdhc.dtsi is self explaining.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I also forgot to mention:&lt;/P&gt;&lt;P&gt;I'm using Linux-Kernel 4.19.127 and Debian 9 on this device.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The relevant code-snippet (as I think):&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;IOMUXING:&lt;/STRONG&gt;&lt;BR /&gt; pinctrl_hog: hoggrp {&lt;BR /&gt; fsl,pins = &amp;lt; &lt;BR /&gt; MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0&amp;nbsp; &amp;nbsp; &amp;nbsp;/* LED CAN Run */&lt;BR /&gt; MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0&amp;nbsp; &amp;nbsp; &amp;nbsp;/* LED CAN Error */&lt;BR /&gt; MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0&amp;nbsp; &amp;nbsp; &amp;nbsp;/* 5V 12V Poweroff */&lt;BR /&gt; MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0&amp;nbsp; &amp;nbsp; &amp;nbsp;/* Dig Out 0 */&lt;BR /&gt; MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0&amp;nbsp; &amp;nbsp; &amp;nbsp;/* Dig Out 1 */&lt;BR /&gt; MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0&amp;nbsp; &amp;nbsp; &amp;nbsp;/* Dig Out 2 */&lt;BR /&gt; MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0&amp;nbsp; &amp;nbsp;/* Dig In 0 */&lt;BR /&gt; MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0&amp;nbsp; &amp;nbsp;/* Dig In 1 */&lt;BR /&gt; MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0&amp;nbsp; &amp;nbsp;/* Dig In 2 */&lt;BR /&gt; &lt;STRONG&gt;MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0&amp;nbsp; &amp;nbsp;/* WLAN Interrupt */&lt;/STRONG&gt;&lt;BR /&gt; MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; /* USB H1 PWR En */ &lt;BR /&gt; MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; /* USB OTG PWR En */&lt;BR /&gt; &amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pinctrl_wlan_vmmc: wlan_vmmcgrp {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;BR /&gt; MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x13059 /* WLAN Enable */&lt;BR /&gt; &amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;pinctrl_usdhc4: usdhc4grp {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;BR /&gt; MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059&lt;BR /&gt; MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059&lt;BR /&gt; MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059&lt;BR /&gt; MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059&lt;BR /&gt; MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059&lt;BR /&gt; MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059&lt;BR /&gt; &amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;WLAN Enable Regulator:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;reg_wlan_vmmc: regulator@5 {&lt;BR /&gt; compatible = "regulator-fixed";&lt;BR /&gt; reg = &amp;lt;5&amp;gt;;&lt;BR /&gt; pinctrl-names = "default";&lt;BR /&gt; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_wlan_vmmc&amp;gt;;&lt;BR /&gt; regulator-name = "reg_wlan_vmmc";&lt;BR /&gt; regulator-min-microvolt = &amp;lt;3300000&amp;gt;;&lt;BR /&gt; regulator-max-microvolt = &amp;lt;3300000&amp;gt;;&lt;BR /&gt; gpio = &amp;lt;&amp;amp;gpio2 7 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; startup-delay-us = &amp;lt;70000&amp;gt;;&lt;BR /&gt; enable-active-high;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;The USDHC-Interface the WLAN-Module is attached to:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;usdhc4: usdhc@0219c000 {&lt;BR /&gt; compatible = "fsl,imx6q-usdhc";&lt;BR /&gt; reg = &amp;lt;0x0219c000 0x4000&amp;gt;;&lt;BR /&gt; interrupts = &amp;lt;0 25 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;BR /&gt; clocks = &amp;lt;&amp;amp;clks IMX6QDL_CLK_USDHC4&amp;gt;,&lt;BR /&gt; &amp;lt;&amp;amp;clks IMX6QDL_CLK_USDHC4&amp;gt;,&lt;BR /&gt; &amp;lt;&amp;amp;clks IMX6QDL_CLK_USDHC4&amp;gt;;&lt;BR /&gt; clock-names = "ipg", "ahb", "per";&lt;BR /&gt; bus-width = &amp;lt;4&amp;gt;;&lt;BR /&gt; pinctrl-names = "default";&lt;BR /&gt; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_usdhc4&amp;gt;;&lt;BR /&gt; non-removable; &lt;BR /&gt; vmmc-supply = &amp;lt;&amp;amp;reg_wlan_vmmc&amp;gt;;&lt;BR /&gt; cap-power-off-card;&lt;BR /&gt; keep-power-in-suspend;&lt;BR /&gt; status = "okay";&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt; wlcore: wlcore@0 {&lt;BR /&gt; compatible = "ti,wl1837";&lt;BR /&gt; reg = &amp;lt;0&amp;gt;;&lt;BR /&gt; &lt;STRONG&gt;interrupt-parent = &amp;lt;&amp;amp;gpio6&amp;gt;;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; interrupts = &amp;lt;16 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;/STRONG&gt;&lt;BR /&gt; };&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you need more informations?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 20 Jun 2020 08:14:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071467#M157365</guid>
      <dc:creator>steffendoster</dc:creator>
      <dc:date>2020-06-20T08:14:42Z</dc:date>
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      <title>Re: Interrupt Input boots up as Output</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071468#M157366</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Steffen&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;NANDF_CS3 is configured as GPIO6_IO16 output and used as LCD CABC_EN&lt;/P&gt;&lt;P&gt;signal on i.MX6DL-SDP Sabre schematic :&lt;/P&gt;&lt;P&gt;hannstar_cabc.. lvds1 {gpios = &amp;lt;&amp;amp;gpio6 16 GPIO_ACTIVE_HIGH&amp;gt;;&amp;nbsp;&amp;nbsp; in&amp;nbsp;&amp;nbsp; imx6qdl-sabresd.dtsi&lt;BR /&gt;&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm/boot/dts/imx6qdl-sabresd.dtsi?h=imx_4.14.98_2.3.0" target="test_blank"&gt;https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm/boot/dts/imx6qdl-sabresd.dtsi?h=imx_4.14.98_2.3.0&lt;/A&gt;&lt;/P&gt;&lt;H3 class=""&gt;&lt;A class="" data-dtmaction="Documents and Software Results - Software Link click" data-dtmsubaction="Design files, including hardware schematics, Gerbers, and OrCAD files for i.MX 6Quad (i.MX 6Dual emulation)" href="https://www.nxp.com/webapp/Download?colCode=iMX6Q-SABRE-SDB-DESIGNFILES&amp;amp;appType=license"&gt;Design files, including hardware schematics, Gerbers, and OrCAD files for i.MX 6Quad (i.MX 6Dual emulation)&lt;/A&gt;&lt;/H3&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 21 Jun 2020 23:14:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071468#M157366</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-06-21T23:14:19Z</dc:date>
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      <title>Re: Interrupt Input boots up as Output</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071469#M157367</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;well this could answer my question IF I use SabreSD. But as I mentioned in my original post I use a custom board. And on this board NANDF_CS3 is only wired to the Interrupt output of ti, wl1837 and is configured as GPIO16.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So this does not apply to me, sorry.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Greetings&lt;/P&gt;&lt;P&gt;Steffen&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jun 2020 07:19:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071469#M157367</guid>
      <dc:creator>steffendoster</dc:creator>
      <dc:date>2020-06-22T07:19:00Z</dc:date>
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      <title>Re: Interrupt Input boots up as Output</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071470#M157368</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV class=""&gt;&lt;P&gt;Hi Steffen,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;nxp supports only nxp reference boards and boards which are based on these designs.&lt;BR /&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;For other designs developed and based on third party boards may be recommended&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;to apply to tech support of vendors of these boards.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jun 2020 07:33:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071470#M157368</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-06-22T07:33:52Z</dc:date>
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      <title>Re: Interrupt Input boots up as Output</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071471#M157369</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am the vendor!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Greetings&lt;/P&gt;&lt;P&gt;Steffen&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jun 2020 07:36:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071471#M157369</guid>
      <dc:creator>steffendoster</dc:creator>
      <dc:date>2020-06-22T07:36:30Z</dc:date>
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      <title>Re: Interrupt Input boots up as Output</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071472#M157370</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Steffen&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can try to debug it, printf or attach jtag debugger and&lt;/P&gt;&lt;P&gt;check IOMUXC_SW_MUX_CTL_PAD_NAND_CS3_B,&amp;nbsp;GPIOx_GDIR registers described in&lt;/P&gt;&lt;P&gt;sect.37.4.156 Pad Mux Register (IOMUXC_SW_MUX_CTL_PAD_NAND_CS3_B),&lt;/P&gt;&lt;P&gt;sect.29.5.2 GPIO direction register (GPIOx_GDIR)&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX6SDLRM" target="_blank"&gt;&lt;STRONG&gt;i.MX 6Solo/6DualLite Applications Processor Reference Manual&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;&lt;P&gt;May be helpful &lt;A href="https://www.nxp.com/docs/en/application-note/AN4553.pdf" target="_blank"&gt;&lt;STRONG&gt;Using Open Source Debugging Tools for Linux on i.MX Processors&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Also recommended to reproduce issue on i.MX6DL Sabre SD board with nxp linux :&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/tree/?h=imx_5.4.3_2.0.0" title="https://source.codeaurora.org/external/imx/linux-imx/tree/?h=imx_5.4.3_2.0.0"&gt;linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jun 2020 07:58:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071472#M157370</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-06-22T07:58:23Z</dc:date>
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      <title>Re: Interrupt Input boots up as Output</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071473#M157371</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;it seems I have found the cause of the problem:&lt;/P&gt;&lt;P&gt;My Bootloader configures this pin as Output with value '0'.&lt;/P&gt;&lt;P&gt;What I don't get is: why is Linux/Devicetree not able to correct this setting?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jun 2020 07:19:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071473#M157371</guid>
      <dc:creator>steffendoster</dc:creator>
      <dc:date>2020-06-23T07:19:37Z</dc:date>
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    <item>
      <title>Re: Interrupt Input boots up as Output</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071474#M157372</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;linux dts does not configure (change) gpio direction.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jun 2020 11:38:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Input-boots-up-as-Output/m-p/1071474#M157372</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-06-23T11:38:34Z</dc:date>
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