<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX Processors中的主题 LPDDR4 Hynix IC training failed using i.MX8MQ</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065641#M156612</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am using i.MX8MQ on my PCB. For the memory part, I was using Micron LPDDR4 16Gb IC with 1 CS. It was working normally from 1600Mbps to 3200Mbps. Recently, I changed to use Hynix LPDDR4 16Gb IC with 1 CS which is the same configuration as the Micron part. But I found that the system boot up failed at the training stage. This fail happened when data rate is higher than 2866Mbps. This Hynix IC is original Hynix good die with speed grade 3733Mbps. Does anyone have suggestion on this issue? &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 18 Jun 2020 08:49:38 GMT</pubDate>
    <dc:creator>simonng</dc:creator>
    <dc:date>2020-06-18T08:49:38Z</dc:date>
    <item>
      <title>LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065641#M156612</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am using i.MX8MQ on my PCB. For the memory part, I was using Micron LPDDR4 16Gb IC with 1 CS. It was working normally from 1600Mbps to 3200Mbps. Recently, I changed to use Hynix LPDDR4 16Gb IC with 1 CS which is the same configuration as the Micron part. But I found that the system boot up failed at the training stage. This fail happened when data rate is higher than 2866Mbps. This Hynix IC is original Hynix good die with speed grade 3733Mbps. Does anyone have suggestion on this issue? &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Jun 2020 08:49:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065641#M156612</guid>
      <dc:creator>simonng</dc:creator>
      <dc:date>2020-06-18T08:49:38Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065642#M156613</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Simon&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for new part recommended to run ddr test, use latest RPA tool:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-340179"&gt;i.MX 8M Family DDR Tool Release&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;then rebuild software using guidelines given in Chapter 4 How to bring up a&lt;/P&gt;&lt;P&gt;new MX8M board "MX8M DDR Tool User Guide" document included in package.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jun 2020 00:46:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065642#M156613</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-06-19T00:46:22Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065643#M156614</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your reply. I have already used the latest RPA tool Rev. 24 with DDR Tool v3.1 to check the functionality of the new Hynix part. Here is the fail log I got.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;DIV dir="ltr"&gt;&lt;DIV style="font-size: 12pt; font-family: 'Calibri'; color: #000000;"&gt;&lt;DIV&gt;---DDR 2D-Training @1600Mhz...&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; [Process] End of initialization&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; [Process] End of 2D read delay/voltage center optimization&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; PMU: Error: No passing region found for 1 or more lanes. Set hdtCtrl=4 to see passing regions&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; PMU: ***** Assertion Error - terminating *****&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; [Result] FAILED&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have no idea why the Hynix parts failed but they have the same chip configuration as the Micron parts.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Simon&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jun 2020 03:45:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065643#M156614</guid>
      <dc:creator>simonng</dc:creator>
      <dc:date>2020-06-19T03:45:55Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065644#M156615</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Simon&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can try to tweak drive strength settings (search in RPA file),&lt;/P&gt;&lt;P&gt;like DDR3 MR2 and MR3 Register Settings.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jun 2020 04:25:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065644#M156615</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-06-19T04:25:34Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065645#M156616</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I already tried different MRS settings but still failed. Do you have any suggestion?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Simon&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jun 2020 10:54:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065645#M156616</guid>
      <dc:creator>simonng</dc:creator>
      <dc:date>2020-06-19T10:54:38Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065646#M156617</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Simon&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;probably board layout has marginal ddr timings, not sufficient for that particular&lt;/P&gt;&lt;P&gt;memory, so recheck board lpddr4 layout guidelines in&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX8HWDG" target="_blank"&gt;&lt;STRONG&gt;i.MX 8QuadMax/i.MX 8QuadXPlus Hardware Developer’s Guide&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jun 2020 13:31:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065646#M156617</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-06-19T13:31:11Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065647#M156618</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/113388i5B525CB2D1620F1B/image-size/large?v=v2&amp;amp;px=999" title="DSC_0050.JPG" alt="DSC_0050.JPG" /&gt;&lt;/span&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We modified the NXP &lt;A data-dtmaction="Buy Section - Link Click" data-dtmsubaction="MCIMX8M-EVKB" href="https://www.nxp.com/part/MCIMX8M-EVKB"&gt;&lt;SPAN style="color: #0066cc; text-decoration: underline; "&gt;MCIMX8M-EVKB&lt;/SPAN&gt;&lt;/A&gt;&amp;nbsp;to install a LPDDR4 200B test socket on it. So we can test different LPDDR4 200B parts on it. The Hynix 16Gb part also has the same failure on the MCIMX8M-EVKB as our own board.&lt;/P&gt;&lt;P&gt;I have attached the image of the modified MCIMX8M-EVKB&amp;nbsp;for your reference.&lt;/P&gt;&lt;P&gt;I don't think it is due to board layout issue. Do you have any further suggestions?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Simon&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jun 2020 06:33:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065647#M156618</guid>
      <dc:creator>simonng</dc:creator>
      <dc:date>2020-06-22T06:33:41Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065648#M156619</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I tried to fine tune the termination settings. Then the best I can do with the Hynix 16Gb SDP IC is 3000Mbps.&lt;/P&gt;&lt;P&gt;Here is the details:&lt;/P&gt;&lt;P&gt;1) MR11 set to 0x33&lt;/P&gt;&lt;P&gt;2) ATxImpedance set to 30 Ohm&lt;/P&gt;&lt;P&gt;3)&amp;nbsp;SlewFallAC set to 0x12&lt;/P&gt;&lt;P&gt;But I still can't push the speed up to 3200Mbps. Failed during the DDR 2D Training at 3200Mbps.&lt;/P&gt;&lt;P&gt;Does anyone have similar experience? How to further push the speed?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Simon&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Jun 2020 08:03:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065648#M156619</guid>
      <dc:creator>simonng</dc:creator>
      <dc:date>2020-06-25T08:03:03Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065649#M156620</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV class=""&gt;&lt;P&gt;Hi Simon&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;still can't push the speed up to 3200Mbps. Failed during the DDR 2D Training at 3200Mbps.&lt;/P&gt;&lt;P&gt;&amp;gt; How to further push the speed?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;probably board layout has marginal ddr timings, not sufficient for that particular&lt;/P&gt;&lt;P&gt;memory, so suggest recheck board lpddr4 layout guidelines in&lt;/P&gt;&lt;P&gt;&lt;A data-content-finding="Community" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.nxp.com%2Fwebapp%2FDownload%3FcolCode%3DIMX8HWDG" rel="nofollow" target="_blank"&gt;&lt;STRONG&gt;i.MX 8QuadMax/i.MX 8QuadXPlus Hardware Developer’s Guide&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Jun 2020 11:11:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065649#M156620</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-06-25T11:11:28Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065650#M156621</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your quick reply. I am using the&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;MCIMX8M-EVKB and solder out the LPDDR4 IC. Then solder a LPDDR4 200B test socket on it. We didn't change the layout on the EVKB but the best I can do it 3000Mbps for that Hynix chip.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Still not able to push further.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Simon&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Jun 2020 13:54:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065650#M156621</guid>
      <dc:creator>simonng</dc:creator>
      <dc:date>2020-06-25T13:54:07Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065651#M156622</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;P&gt;Hi Simon&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;may be suggested to apply to &amp;nbsp;Hynix&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;for additional recommendations for that part.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;BTW what about other lpddr4 parts, had you tried them with socket?&lt;/P&gt; &lt;BR /&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Jun 2020 14:33:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065651#M156622</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-06-25T14:33:02Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065652#M156623</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have tried other SpecTek or Micron parts on the EVKB with the socket. They are working fine at 3200Mbps.&lt;/P&gt;&lt;P&gt;I attached the test scripts and result log files for the Hynix part. Some of them can pass up to 3000Mbps but some of them can only pass up to 2868Mbps.&lt;/P&gt;&lt;P&gt;I can ship the EVKB with the socket and some Hynix parts to you to debug this problem. Do you want me to do that?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Simon&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Jun 2020 05:59:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065652#M156623</guid>
      <dc:creator>simonng</dc:creator>
      <dc:date>2020-06-29T05:59:20Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4 Hynix IC training failed using i.MX8MQ</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065653#M156624</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Simon&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt;I can ship the EVKB with the socket and some Hynix parts to you to&lt;/P&gt;&lt;P&gt;&amp;gt;debug this problem. Do you want me to do that?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;nxp has special service for such kind of issues: &lt;A class="link-titled" href="https://www.nxp.com/support/support/nxp-engineering-services/professional-engineering-services:PROFESSIONAL-ENGINEERING-SERVICES" title="https://www.nxp.com/support/support/nxp-engineering-services/professional-engineering-services:PROFESSIONAL-ENGINEERING-SERVICES"&gt;Professional Engineering Services | NXP&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;suggest to proceed with it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Jun 2020 07:48:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4-Hynix-IC-training-failed-using-i-MX8MQ/m-p/1065653#M156624</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-06-29T07:48:03Z</dc:date>
    </item>
  </channel>
</rss>

