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    <title>topic How to enable clock gating registers for GPIO in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-enable-clock-gating-registers-for-GPIO/m-p/1050530#M154669</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi There,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm in the process of bringing up an iMX6ULL based board with&amp;nbsp;Linux imx6ul7d 5.4.24-2.1.0. We have a number of GPIO pins we need to use. However when I try to interact with them in Linux using sysfs, the board either locks up or nothing happens. I eventually chased this down to the clock gating registers not being set for the relevant GPIO clocks. In U-Boot we set all clock gating registers to 0xFFFFFFFF, however I read that Linux disables the unused clocks and I'm assuming this is the cause of our problem. I know there is a way to add a kernel command line parameter to prevent this. However, I was wondering if there is a better way to do this that integrates with the device tree.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Snipits from the device tree:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&amp;amp;gpio1 {&lt;BR /&gt; gpio-reserved-ranges = &amp;lt;0 32&amp;gt;;&lt;BR /&gt; gpio-ranges = &amp;lt;&amp;amp;iomuxc 0 23 10&amp;gt;, &amp;lt;&amp;amp;iomuxc 10 17 6&amp;gt;,&lt;BR /&gt; &amp;lt;&amp;amp;iomuxc 16 33 16&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;gpio2 {&lt;BR /&gt; gpio-ranges = &amp;lt;&amp;amp;iomuxc 0 49 16&amp;gt;, &amp;lt;&amp;amp;iomuxc 16 111 6&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;gpio3 {&lt;BR /&gt; gpio-ranges = &amp;lt;&amp;amp;iomuxc 0 65 29&amp;gt;;&lt;BR /&gt; status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;gpio4 {&lt;BR /&gt; gpio-ranges = &amp;lt;&amp;amp;iomuxc 0 94 17&amp;gt;, &amp;lt;&amp;amp;iomuxc 17 117 12&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;gpio5 {&lt;BR /&gt; gpio-ranges = &amp;lt;&amp;amp;iomuxc 0 7 10&amp;gt;, &amp;lt;&amp;amp;iomuxc 10 5 2&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;And we have a default iomuxc config&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&amp;amp;iomuxc {&lt;BR /&gt; pinctrl-names = "default";&lt;BR /&gt; pinctrl-0 = &amp;lt;&amp;amp;BOARD_InitPins&amp;gt;;&lt;BR /&gt; imx6ul-evk {&lt;BR /&gt; BOARD_InitPins: BOARD_InitPinsGrp {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;BR /&gt; MX6UL_PAD_SD1_CLK__GPIO2_IO17 0x0000B830&lt;/P&gt;&lt;P&gt;MX6UL_PAD_LCD_DATA04__GPIO3_IO09 0x0000B830&lt;BR /&gt; MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA13__GPIO3_IO18 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA14__GPIO3_IO19 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA15__GPIO3_IO20 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x0000B030&lt;BR /&gt; MX6UL_PAD_LCD_DATA23__GPIO3_IO28 0x00003030&lt;BR /&gt; &amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, I see all of the clocks defined in imx6ul-clock.h, however I do not see the GPIO clock gates. How do the integers assigned to each clock get mapped into the gating registers? Perhaps I'm miss understanding something here.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any help is would be much appreciated.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 20 Aug 2020 09:00:40 GMT</pubDate>
    <dc:creator>simon_willis</dc:creator>
    <dc:date>2020-08-20T09:00:40Z</dc:date>
    <item>
      <title>How to enable clock gating registers for GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-enable-clock-gating-registers-for-GPIO/m-p/1050530#M154669</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi There,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm in the process of bringing up an iMX6ULL based board with&amp;nbsp;Linux imx6ul7d 5.4.24-2.1.0. We have a number of GPIO pins we need to use. However when I try to interact with them in Linux using sysfs, the board either locks up or nothing happens. I eventually chased this down to the clock gating registers not being set for the relevant GPIO clocks. In U-Boot we set all clock gating registers to 0xFFFFFFFF, however I read that Linux disables the unused clocks and I'm assuming this is the cause of our problem. I know there is a way to add a kernel command line parameter to prevent this. However, I was wondering if there is a better way to do this that integrates with the device tree.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Snipits from the device tree:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&amp;amp;gpio1 {&lt;BR /&gt; gpio-reserved-ranges = &amp;lt;0 32&amp;gt;;&lt;BR /&gt; gpio-ranges = &amp;lt;&amp;amp;iomuxc 0 23 10&amp;gt;, &amp;lt;&amp;amp;iomuxc 10 17 6&amp;gt;,&lt;BR /&gt; &amp;lt;&amp;amp;iomuxc 16 33 16&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;gpio2 {&lt;BR /&gt; gpio-ranges = &amp;lt;&amp;amp;iomuxc 0 49 16&amp;gt;, &amp;lt;&amp;amp;iomuxc 16 111 6&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;gpio3 {&lt;BR /&gt; gpio-ranges = &amp;lt;&amp;amp;iomuxc 0 65 29&amp;gt;;&lt;BR /&gt; status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;gpio4 {&lt;BR /&gt; gpio-ranges = &amp;lt;&amp;amp;iomuxc 0 94 17&amp;gt;, &amp;lt;&amp;amp;iomuxc 17 117 12&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;gpio5 {&lt;BR /&gt; gpio-ranges = &amp;lt;&amp;amp;iomuxc 0 7 10&amp;gt;, &amp;lt;&amp;amp;iomuxc 10 5 2&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;And we have a default iomuxc config&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&amp;amp;iomuxc {&lt;BR /&gt; pinctrl-names = "default";&lt;BR /&gt; pinctrl-0 = &amp;lt;&amp;amp;BOARD_InitPins&amp;gt;;&lt;BR /&gt; imx6ul-evk {&lt;BR /&gt; BOARD_InitPins: BOARD_InitPinsGrp {&lt;BR /&gt; fsl,pins = &amp;lt;&lt;BR /&gt; MX6UL_PAD_SD1_CLK__GPIO2_IO17 0x0000B830&lt;/P&gt;&lt;P&gt;MX6UL_PAD_LCD_DATA04__GPIO3_IO09 0x0000B830&lt;BR /&gt; MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA13__GPIO3_IO18 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA14__GPIO3_IO19 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA15__GPIO3_IO20 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x00011030&lt;BR /&gt; MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x0000B030&lt;BR /&gt; MX6UL_PAD_LCD_DATA23__GPIO3_IO28 0x00003030&lt;BR /&gt; &amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, I see all of the clocks defined in imx6ul-clock.h, however I do not see the GPIO clock gates. How do the integers assigned to each clock get mapped into the gating registers? Perhaps I'm miss understanding something here.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any help is would be much appreciated.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Aug 2020 09:00:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-enable-clock-gating-registers-for-GPIO/m-p/1050530#M154669</guid>
      <dc:creator>simon_willis</dc:creator>
      <dc:date>2020-08-20T09:00:40Z</dc:date>
    </item>
    <item>
      <title>Re: How to enable clock gating registers for GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-enable-clock-gating-registers-for-GPIO/m-p/1050531#M154670</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Simon&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can look at linux clock driver (like &amp;nbsp;imx_clk_hw_gate2("gpio2",..)&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/clk/imx/clk-imx6ul.c?h=imx_5.4.24_2.1.0" title="https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/clk/imx/clk-imx6ul.c?h=imx_5.4.24_2.1.0"&gt;clk-imx6ul.c\imx\clk\drivers - linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Aug 2020 10:58:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-enable-clock-gating-registers-for-GPIO/m-p/1050531#M154670</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-08-20T10:58:08Z</dc:date>
    </item>
    <item>
      <title>Re: How to enable clock gating registers for GPIO</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-enable-clock-gating-registers-for-GPIO/m-p/1050532#M154671</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks Igor. That helped a lot. It turns out that these clocks were not defined in the imx6ul-clocks.h header file I'm using (as per:&amp;nbsp;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/tree/include/dt-bindings/clock/imx6ul-clock.h?h=imx_5.4.24_2.1.0" title="https://source.codeaurora.org/external/imx/linux-imx/tree/include/dt-bindings/clock/imx6ul-clock.h?h=imx_5.4.24_2.1.0"&gt;imx6ul-clock.h\clock\dt-bindings\include - linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;).&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And then I just needed to add the clock definition to each GPIO node as per your link.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Aug 2020 22:53:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-enable-clock-gating-registers-for-GPIO/m-p/1050532#M154671</guid>
      <dc:creator>simon_willis</dc:creator>
      <dc:date>2020-08-20T22:53:09Z</dc:date>
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