i.MX Processors中的主题 Re: imx8mq Dual Lane DisplayPort

imx8mq Dual Lane DisplayPort

guido_gunther — Tue, 18 Aug 2020 13:45:22 GMT

Hi,

I'm working with the mhdp/dcss driver based off of NXPs BSP and am using the 8.7 firmware from

https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.7.bin

While 4-Lane DisplayPort configurations work, dual lane configurations fail the link training like (i've added some printk to the training code in cdns-mhdp-common.c):

[   61.093206] cdns-mhdp-imx 32c00000.hdmi: [drm:cdns_mhdp_train_link [cdns_mhdp_drmcore]] Training status: 0x4

[   61.148744] cdns-mhdp-imx 32c00000.hdmi: [drm:cdns_mhdp_train_link [cdns_mhdp_drmcore]] Training status: 0x20
...
[   61.541297] cdns-mhdp-imx 32c00000.hdmi: [drm:cdns_mhdp_train_link [cdns_mhdp_drmcore]] Training status: 0x0
[   61.551221] cdns-mhdp-imx 32c00000.hdmi: [drm:cdns_mhdp_train_link [cdns_mhdp_drmcore]] *ERROR* training failed: -110
[   61.561890] cdns-mhdp-imx 32c00000.hdmi: [drm:cdns_mhdp_train_link [cdns_mhdp_drmcore]] *ERROR* Failed to start training -110
[   61.573294] cdns-mhdp-imx 32c00000.hdmi: [drm:cdns_dp_mode_set [cdns_mhdp_drmcore]] *ERROR* Failed link train -110

So the training can finish clock recovery but gives up with

EQ_PHASE_FAILED

Are there any special settings required to switch to 2 lane mode. Can someone confirm this should work ?

The reference manual does not give any details on how to configure two lane mode. I can see that the number of lanes is passed down to the phy and used in

cdns_mhdp_set_host_cap()

I assume it should not affect the LANES_CONFIG register, right?

Can you please specify the details of correct PHY and HDMITX setup for two lane DP mode on the imx8mq?

Re: imx8mq Dual Lane DisplayPort

igorpadykov — Wed, 19 Aug 2020 01:44:37 GMT

Hi Guido

one can look at similar issue on

https://community.nxp.com/message/1284068?commentID=1284068#comment-1284068

as for "8.7 firmware" - (it is mentioned in Table 3. BSP and Multimedia standard packages

attached Release Notes) it was used in old linux releases and there are DP issues described in

Table 14. Known issues and workarounds for i.MX 8 Family SoC Release Notes

All documentation:

Embedded Linux for i.MX Applications Processors | NXP

Recommended to use latest Linux 5.4.24_2.1.0 (firmware-imx-8.8.bin) where seems these were fixed.

Best regards
igor
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Re: imx8mq Dual Lane DisplayPort

guido_gunther — Wed, 19 Aug 2020 08:19:40 GMT

Hi Igor,

I had checked the above thread regarding display port before and just changed to the driver in 5.4.24_2.1.0 and firmware-imx-8.8.bin but that does not fix the link training in dual lane mode for me.

Note that it looks like training finished clock recovery but fails in the EQ phase. Is there any other data i can provide to diagnose the problem?

Re: imx8mq Dual Lane DisplayPort

igorpadykov — Wed, 19 Aug 2020 11:18:38 GMT

Hi Guido

could you try to test on NXP i.MX8MQ EVK board with NXP Linux from

source.codeaurora.org/external/imx/linux-imx repository

imx8mq-evk-dp.dts

imx8mq-evk-dp.dts\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel

All linux documentation:

Embedded Linux for i.MX Applications Processors | NXP

Best regards
igor

Re: imx8mq Dual Lane DisplayPort

guido_gunther — Thu, 20 Aug 2020 08:39:10 GMT

Hi Igor,

I can't test with the EVK since the one i have only drives HDMI so i have to use our board for that. The mhdp/dcss driver corresponds to this branch linux-imx - i.MX Linux kernel and the DT bits look like what you linked to:

```

&dcss {
status = "okay";

        port@0 {
                dcss_out: endpoint {
                          remote-endpoint = <&hdmi_in>;
                };
        };
};

&hdmi {
        compatible = "cdn,imx8mq-dp";
        lane-mapping = <0xc6>;
        status = "okay";
        port@1 {
                hdmi_in: endpoint {
                        remote-endpoint = <&dcss_out>;
                };
        };
};

```

As i wrote above 4 lane DP works so i suspect either a firmware or driver issue.

Re: imx8mq Dual Lane DisplayPort

igorpadykov — Thu, 20 Aug 2020 10:34:09 GMT

Hi Guido

dual lane eDP (LTK156D30A004) was verified by boundary devices

https://boundarydevices.com/edp-display-support-on-nitrogen8m/

linux-imx6/imx8mq-nitrogen8m-edp.dts at boundary-imx_4.14.x_2.0.0_ga · boundarydevices/linux-imx6 · GitHub

Seems you used only driver and firmware from source.codeaurora.org/external/imx/linux-imx repository,

not whole linux image, right ? For such kind of development may be suggested to proceed with help of

NXP Professional Services:
Professional Engineering Services | NXP

Best regards
igor

Re: imx8mq Dual Lane DisplayPort

smusserRosen — Thu, 08 Jun 2023 18:49:23 GMT

Hey @guido_gunther,

Did you resolve your issue with the two-lane link training? Auxiliary communication works, we receive edid, so the dp firmware is running and included in the uuu-programming script. The lane mapping is correct (c6), and link training says it succeeds. However, transmission does not seem to occur as we get no picture.

Thanks,

Sam