MIPI DSI HFP stability

mark_vogt1 — Sun, 14 Jun 2020 19:10:42 GMT

I have trying to connect a 800x480 RGB TFT to an imx8m mini using a bridge chip. I have tried 2 different bridge vendors ic's and both show the same issue. The horizontal front porch is not consistent from line to line. I am seeing a variation of up to 7x pixel clocks per line.

In the attachment I am triggering on the rising edge of data enable. The horizontal sync is stable, and you can see this issue in the falling edge of data enable for the previous frame.

I have tried all MIPI DSI flag combinations in the linux driver without success. I am currently using Video mode without burst and MIPI_DSI_MODE_VIDEO_SYNC_PULSE. Adjusting these flags change the jitter, but not remove it.

Is there some setting that I'm missing?

Mark

Re: MIPI DSI HFP stability

igorpadykov — Wed, 17 Jun 2020 00:55:54 GMT

Hi Mark

such configuration seems is working fine on DART-MX8MMini board:

linux-imx/fsl-imx8mm-var-dart.dts at imx_4.19.35_1.1.0_var01 · varigit/linux-imx · GitHub

DART-MX8M-MINI : NXP i.MX8M Mini ARM SoM (System on Module) | Variscite

other bridge example

linux-imx-tn/imx8mm-pico-pi-sn65dsi84-hj070na.dts at tn-imx_4.14.98_2.0.0_ga-wip-mipi2lvds · TechNexion-customization/li…

https://www.technexion.com/products/system-on-modules/pico/pico-compute-modules/detail/PICO-IMX8M-MINI

Best regards
igor
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topic MIPI DSI HFP stability in i.MX Processors

MIPI DSI HFP stability

Re: MIPI DSI HFP stability