topic Re: RMII Support in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/RMII-Support/m-p/1038857#M153069 <HTML><HEAD></HEAD><BODY><P>Hello Peleg,</P><P>Hope you are doing well.</P><P>Yes, the ENET2 has the same functionality as the ENET, with the corresponding pins. The table which describes the external signals only specifies the ENET. However, you can find that all the registers say ENETx_..., this means that the configuration applies to both.</P><P>I would recommend to use the table 41-2 as a reference for the mode and description then find the corresponding pin on enet 2.</P><P>Best Regards,</P><P>Sabina</P><P>-----------------------------------------------------------------------------------------------------------------------</P><P>Note: If this post answers your question, please click the Correct Answer button. Thank you!</P><P>-----------------------------------------------------------------------------------------------------------------------&nbsp;</P></BODY></HTML> Thu, 02 Apr 2020 14:45:02 GMT Sabina_Bruce 2020-04-02T14:45:02Z RMII Support https://community.nxp.com/t5/i-MX-Processors/RMII-Support/m-p/1038856#M153068 <HTML><HEAD></HEAD><BODY><P style="direction: ltr;">hey,</P><P style="direction: ltr;">i want to use 2 RMII channels in&nbsp;MIMXRT1061CVJ5A.</P><P style="direction: ltr;">does pin&nbsp;GPIO_B1_00 for example suitable as RX_ER for&nbsp;<STRONG>RMII&nbsp;</STRONG>mode in channel 2?</P><P style="direction: ltr;"><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/100438i820ACB050FD0D37E/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /></span></P><P style="direction: ltr;">as you can see here:</P><P style="direction: ltr;"><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/101036i17983553BD4C4269/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /></span></P><P style="direction: ltr;"><SPAN>in channel 1, written so its clear that the io support both modes.</SPAN></P><P style="direction: ltr;"><SPAN>same as EX_ER, the question is about all this pins:</SPAN></P><UL><LI style="text-indent: -18.0pt;"><SPAN>REF_CLK</SPAN> <SPAN>-</SPAN> <SPAN>GPIO_B0_15</SPAN>(<SPAN>ALT9</SPAN>).</LI><LI style="text-indent: -18.0pt;"><SPAN>MDC &amp; MDIO</SPAN>&nbsp;-&nbsp;<SPAN>GPIO_B0_00</SPAN> &amp; <SPAN>GPIO_B0_01</SPAN>&nbsp; (<SPAN>ALT8</SPAN>).</LI><LI style="text-indent: -18.0pt;"><SPAN>TX0+1</SPAN> <SPAN>-</SPAN> <SPAN>GPIO_B1_14 &amp; GPIO_B1_14</SPAN>, 2&nbsp; (<SPAN>ALT8</SPAN>).</LI><LI style="text-indent: -18.0pt;"><SPAN>RX0+1</SPAN> <SPAN>-</SPAN> <SPAN>GPIO_B1_02&amp; GPIO_B1_01</SPAN>, 2 . (<SPAN>ALT8</SPAN>).</LI><LI style="text-indent: -18.0pt;"><SPAN>CRS</SPAN> <SPAN>-</SPAN> <SPAN>GPIO_B0_10</SPAN>&nbsp;(<SPAN>ALT8</SPAN>).</LI><LI style="text-indent: -18.0pt;"><SPAN>RX_ER&nbsp;-</SPAN><SPAN>GPIO_B1_00</SPAN>.<SPAN style="font-size: 11.0pt;">(</SPAN><SPAN style="font-size: 11.0pt;">ALT8</SPAN><SPAN style="font-size: 11.0pt;">).</SPAN></LI><LI style="text-indent: -18.0pt;"><UL><LI style="text-indent: -18.0pt;"><SPAN>TX_EN -&nbsp;</SPAN><SPAN>GPIO_B0_14</SPAN>. (<SPAN>ALT8</SPAN>).</LI></UL></LI></UL><P style="direction: ltr;"><SPAN>thank you!</SPAN></P></BODY></HTML> Tue, 31 Mar 2020 16:05:05 GMT https://community.nxp.com/t5/i-MX-Processors/RMII-Support/m-p/1038856#M153068 pelegk 2020-03-31T16:05:05Z Re: RMII Support https://community.nxp.com/t5/i-MX-Processors/RMII-Support/m-p/1038857#M153069 <HTML><HEAD></HEAD><BODY><P>Hello Peleg,</P><P>Hope you are doing well.</P><P>Yes, the ENET2 has the same functionality as the ENET, with the corresponding pins. The table which describes the external signals only specifies the ENET. However, you can find that all the registers say ENETx_..., this means that the configuration applies to both.</P><P>I would recommend to use the table 41-2 as a reference for the mode and description then find the corresponding pin on enet 2.</P><P>Best Regards,</P><P>Sabina</P><P>-----------------------------------------------------------------------------------------------------------------------</P><P>Note: If this post answers your question, please click the Correct Answer button. Thank you!</P><P>-----------------------------------------------------------------------------------------------------------------------&nbsp;</P></BODY></HTML> Thu, 02 Apr 2020 14:45:02 GMT https://community.nxp.com/t5/i-MX-Processors/RMII-Support/m-p/1038857#M153069 Sabina_Bruce 2020-04-02T14:45:02Z