i.MX Processors中的主题 ECSPI multibyte transfer without CS toggle

ECSPI multibyte transfer without CS toggle

MicMoba — Fri, 14 Feb 2020 06:49:23 GMT

Hello,

I use a ECSPI on an i.MX6q processor. Attachet to this SPI Master is a FRAM. The SPI itself runs (SCLK, MISO, MOSI) and also the CS. But the CS doesn't work how I expect it.

I use 8 bit per transfer and do my communication by ioctl from userspace. The FRAM works with the rohm,dh2228fv driver which is based on the spidev driver.

To read for exmple the FRAM's ID I have to send a command byte and additionally read three data bytes. The CS should stay low during the whole sequence.

What happen is that the CS goes high after every byte. This causes that I am not able to read the FRAM's ID because a rising edge abort the communication.

I tried to use the cs_change property of the spi_ioc_transfer struct but without sucess.

If I configure the CS pin as normal GPIO and control it myself over the sysfs everything is well. But I am not satisfied with this because it take a long time to set/unset the CS-pin.

I found a patch for the spi-imx.c from 2013 but I can't see that this patch is in the current version of spi-imx.c.

Re: ECSPI multibyte transfer without CS toggle

MicMoba — Fri, 14 Feb 2020 08:42:48 GMT

I solved my problem by using the cs-gpio property instead of cs-num in the DT. So the SPI driver manage the CS as GPIO and the cs_change property works. (Thanks to Sasch Hauer for support)

&ecspi1 {
    status = "okay";
    compatible = "fsl,imx53-ecspi";
    #address-cells = <1>;
   #size-cells = <0>;
    cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_generic_ecspi1>;
    fram: fram@0 {
        compatible = "rohm,dh2228fv"; /* spidev -> cause buggy DT message */
        reg = <0>;
        spi-max-frequency = <34000000>; /* max 34MHz */
    };
};

pinctrl_generic_ecspi1: spi0grp {
            fsl,pins = <
                MX6QDL_PAD_EIM_D18__ECSPI1_MOSI             0x0001B0B0
                MX6QDL_PAD_EIM_D17__ECSPI1_MISO             0x0001B0B0
                MX6QDL_PAD_EIM_D16__ECSPI1_SCLK             0x0001B0B0
                MX6QDL_PAD_EIM_EB2__GPIO2_IO30                0x0001B0B0
                MX6QDL_PAD_EIM_D19__GPIO3_IO19                0x0001B0B0
            >;
        };

Re: ECSPI multibyte transfer without CS toggle

art — Tue, 25 Feb 2020 08:47:59 GMT

It seems to be the correct solution.