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    <title>i.MX ProcessorsのトピックRe: Output transient response</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Output-transient-response/m-p/1027816#M151840</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yasunori&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;NVCC_DRAM limits, defined in Table 8. Operating Ranges&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf" target="_blank"&gt;&lt;STRONG&gt;i.MX 6Solo/6DualLite Applications Processors for Consumer Products&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;&lt;P&gt;should not be exceeded even during transients.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 11 Dec 2019 00:36:20 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2019-12-11T00:36:20Z</dc:date>
    <item>
      <title>Output transient response</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Output-transient-response/m-p/1027815#M151839</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="display: inline !important; float: none; background-color: transparent; color: #3d3d3d; font-family: Helvetica Neue,Helvetica,Arial,Lucida Grande,sans-serif; font-size: 15px; font-style: normal; font-variant: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-decoration: none; text-indent: 0px; text-transform: none; -webkit-text-stroke-width: 0px; white-space: normal; word-spacing: 0px; word-wrap: break-word;"&gt;NVCC_DRAM is 1.35V .&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;i.MX6 solo is input range of the NVCC_DRAM 1.283V to 1.450V.&lt;/P&gt;&lt;P&gt;Due to Output transient respons&lt;SPAN style="display: inline !important; float: none; background-color: transparent; color: #3d3d3d; font-family: Helvetica Neue,Helvetica,Arial,Lucida Grande,sans-serif; font-size: 15px; font-style: normal; font-variant: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-decoration: none; text-indent: 0px; text-transform: none; -webkit-text-stroke-width: 0px; white-space: normal; word-spacing: 0px; word-wrap: break-word;"&gt;e, NVCC_DRAM will be less than 1.283V between 20us and 40us.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;When using MMPF0100(SW3B) The output voltage tolerance is ±3% and the transient response is 50mV(max).&lt;/P&gt;&lt;P&gt;The maximum value is 6% or more 、NVCC_DRAM is&amp;nbsp; 1.283V or less.&lt;/P&gt;&lt;P&gt;Is it necessary to consider the effect of transient response?&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-align: left; color: rgba(0, 0, 0, 0.87); text-transform: none; text-indent: 0px; letter-spacing: normal; font-family: 'Roboto',arial,sans-serif; font-size: 15px; font-style: normal; font-variant: normal; font-weight: 400; text-decoration: none; word-spacing: 0px; display: inline !important; white-space: pre-wrap; orphans: 2; float: none; -webkit-text-stroke-width: 0px; background-color: transparent;"&gt;Is there any problem with 20us and 40us?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Dec 2019 06:02:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Output-transient-response/m-p/1027815#M151839</guid>
      <dc:creator>ban45</dc:creator>
      <dc:date>2019-12-10T06:02:57Z</dc:date>
    </item>
    <item>
      <title>Re: Output transient response</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Output-transient-response/m-p/1027816#M151840</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yasunori&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;NVCC_DRAM limits, defined in Table 8. Operating Ranges&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf" target="_blank"&gt;&lt;STRONG&gt;i.MX 6Solo/6DualLite Applications Processors for Consumer Products&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;&lt;P&gt;should not be exceeded even during transients.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Dec 2019 00:36:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Output-transient-response/m-p/1027816#M151840</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-12-11T00:36:20Z</dc:date>
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