<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic i.MX8M Mini pull-down resistor on boot pins in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-pull-down-resistor-on-boot-pins/m-p/1026433#M151638</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi everyone,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am starting working with i.MX8M Mini processor, for a custom SOM. I am having trouble understanding the behavior of&amp;nbsp; pull-down resistors on GPIO related to the boot circuit.&lt;/P&gt;&lt;P&gt;Does this&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/98660i6D7E2BFD5E46059E/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;mean that if I power the&amp;nbsp;NVCC_JTAG and NVCC_SAI1 pins (both related to the boot pins) with 3.3V, I won't have internal pull-up/down resistors on the pins that control the boot operation mode?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you in advance,&lt;/P&gt;&lt;P&gt;Lorenzo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 13 Feb 2020 15:25:56 GMT</pubDate>
    <dc:creator>lorenzo_rettori</dc:creator>
    <dc:date>2020-02-13T15:25:56Z</dc:date>
    <item>
      <title>i.MX8M Mini pull-down resistor on boot pins</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-pull-down-resistor-on-boot-pins/m-p/1026433#M151638</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi everyone,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am starting working with i.MX8M Mini processor, for a custom SOM. I am having trouble understanding the behavior of&amp;nbsp; pull-down resistors on GPIO related to the boot circuit.&lt;/P&gt;&lt;P&gt;Does this&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/98660i6D7E2BFD5E46059E/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;mean that if I power the&amp;nbsp;NVCC_JTAG and NVCC_SAI1 pins (both related to the boot pins) with 3.3V, I won't have internal pull-up/down resistors on the pins that control the boot operation mode?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you in advance,&lt;/P&gt;&lt;P&gt;Lorenzo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Feb 2020 15:25:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-pull-down-resistor-on-boot-pins/m-p/1026433#M151638</guid>
      <dc:creator>lorenzo_rettori</dc:creator>
      <dc:date>2020-02-13T15:25:56Z</dc:date>
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      <title>Re: i.MX8M Mini pull-down resistor on boot pins</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-pull-down-resistor-on-boot-pins/m-p/1026434#M151639</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;As per ERRATA50080 IO internal pull up/down is not supported in 3.3V mode, must disable the internal pull up/down via software and use external pull up/down resistors instead.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;All IO pin groups are impacted except for XTAL, DDR, PCI, USB and MIPI PHY IO's.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hope this helps,&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Aldo.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt; Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Feb 2020 22:46:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-pull-down-resistor-on-boot-pins/m-p/1026434#M151639</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2020-02-17T22:46:46Z</dc:date>
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      <title>Re: i.MX8M Mini pull-down resistor on boot pins</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-pull-down-resistor-on-boot-pins/m-p/1026435#M151640</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Thanks for your answer.&amp;nbsp;&lt;/P&gt;&lt;P&gt;However, I still have a doubt about the boot conditions, when the software isn't started yet.&amp;nbsp;If during the boot, the internal pull-down resistors aren't disabled yet, does this situation&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/101323iE2BCB8CDBDDC62A2/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;mean that I'll have a voltage partition between the pull-up resistors 4.7k and the internal pull-down resistors? If I need a high logic state on some of those pins, maybe 4.7k is too high considering the minimum value of the internal pull-down resistors (9.1k for 2.25V &amp;lt; Vdd &amp;lt; 2.75V). This schematic is taken from the NXP evaluation board.&lt;/P&gt;&lt;P&gt;Also, from this table&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_20.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/101364iF4213F2B4AC2D43E/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_20.png" alt="pastedImage_20.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;it seems that right after the reset, the pins are pulled down.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I assume that the external pull-up/down resistors used for the evaluation board work, but by reading the datasheet it seems that if the internal pull-down resistor approaches its&amp;nbsp;lower&amp;nbsp;limit indicated in the datasheet, then the voltage level on high logic state during the boot could be below the threshold.&lt;/P&gt;&lt;P&gt;Could you clarify this please?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you in advance,&lt;/P&gt;&lt;P&gt;Lorenzo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Feb 2020 13:48:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-pull-down-resistor-on-boot-pins/m-p/1026435#M151640</guid>
      <dc:creator>lorenzo_rettori</dc:creator>
      <dc:date>2020-02-18T13:48:16Z</dc:date>
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    <item>
      <title>Re: i.MX8M Mini pull-down resistor on boot pins</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-pull-down-resistor-on-boot-pins/m-p/1026436#M151641</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Yes you're correct you'll have a voltage partition between 4.7K pull-up and internal pull-down, only if no external pull down is added, this pull-down resistor is typically 20K (3.3V IOs) which by errata e50080 changes over time from 20k upwards of 92k ohm.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;From errata document IMX8MM_0N87W:&lt;BR /&gt;There is a degradation of the internal IO pullup/pulldown capability when certain IO pads are continuously driven in a 3.3V operating condition which limits the pads pull up/down ability. The impedance of these pads changes over time from 20K to upwards of 92K ohm.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;You may find the errata document here:&lt;BR /&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX8MM_0N87W"&gt;i.MX 8M Mini Mask Set Errata for Mask 0N87W&amp;nbsp;&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hope this helps,&lt;/P&gt;&lt;P&gt;Best regards,&lt;BR /&gt;Aldo.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Feb 2020 22:55:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-Mini-pull-down-resistor-on-boot-pins/m-p/1026436#M151641</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2020-02-21T22:55:39Z</dc:date>
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  </channel>
</rss>

