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    <title>i.MX ProcessorsのトピックDVFS feature on IMX6ULL</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/DVFS-feature-on-IMX6ULL/m-p/1025553#M151559</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;in our custom board we use the IMX6ULL with DVFS pin connected as evalution board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Now ... I have some doubts about the functionality.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I addedd the DVFS block in the DTS file as the EVK and added also the power management in menu config kernel&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And now?&lt;/P&gt;&lt;P&gt;How is possible for the kernel to lead correctly DFVFS pin?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What I have to do to have the DVFS funzctionality working?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Fabio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 13 Feb 2020 10:20:51 GMT</pubDate>
    <dc:creator>fabio_poiatti</dc:creator>
    <dc:date>2020-02-13T10:20:51Z</dc:date>
    <item>
      <title>DVFS feature on IMX6ULL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DVFS-feature-on-IMX6ULL/m-p/1025553#M151559</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;in our custom board we use the IMX6ULL with DVFS pin connected as evalution board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Now ... I have some doubts about the functionality.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I addedd the DVFS block in the DTS file as the EVK and added also the power management in menu config kernel&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And now?&lt;/P&gt;&lt;P&gt;How is possible for the kernel to lead correctly DFVFS pin?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What I have to do to have the DVFS funzctionality working?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Fabio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Feb 2020 10:20:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DVFS-feature-on-IMX6ULL/m-p/1025553#M151559</guid>
      <dc:creator>fabio_poiatti</dc:creator>
      <dc:date>2020-02-13T10:20:51Z</dc:date>
    </item>
    <item>
      <title>Re: DVFS feature on IMX6ULL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DVFS-feature-on-IMX6ULL/m-p/1025554#M151560</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Do you mean the PMIC_STBY_REQ pin of the processor? If so, please note that this pin is only functional when the system goes to the power saving mode (OS goes to sleep).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For the information on how to put the system to the power saving mode and then resume it, please refer to the Section 6.1 "Suspend and resume" of the attached document.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;BR /&gt;Artur&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Feb 2020 08:37:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DVFS-feature-on-IMX6ULL/m-p/1025554#M151560</guid>
      <dc:creator>art</dc:creator>
      <dc:date>2020-02-25T08:37:30Z</dc:date>
    </item>
    <item>
      <title>Re: DVFS feature on IMX6ULL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DVFS-feature-on-IMX6ULL/m-p/1025555#M151561</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;thanks&lt;/P&gt;&lt;P&gt;Fabio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Mar 2020 11:07:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DVFS-feature-on-IMX6ULL/m-p/1025555#M151561</guid>
      <dc:creator>fabio_poiatti</dc:creator>
      <dc:date>2020-03-03T11:07:01Z</dc:date>
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