topic IMX6UL asrc SAI clock source in i.MX Processors

IMX6UL asrc SAI clock source

manuel_soledge — Thu, 21 Nov 2019 14:14:18 GMT

Hi,

page 517 of the IMX6ULL reference manual it is stated that the clocks for the asrc filter can be provided by the Serial Audio Interface SAI (see image below).

However the description of the Clock Source Register (ASRC_ASRCSR) at chapter 16.7.5 page 534 does not describe which bit clock corresponds to which physical clock.

My question is what is the source register setting for SAI1 RX clock on asrc pair A output? And is there a section describing Bit Clocks 0 to E?

Thank you

Manuel BA.

Re: IMX6UL asrc SAI clock source

igorpadykov — Fri, 22 Nov 2019 00:35:13 GMT

Hi Manuel

one can look at sect.9.2.6 Asynchronous Sample Rate Converter (ASRC),

Table 9-1. ASRC Muxed Input Clocks i.MX 6ULL Applications Processor Reference Manual

Best regards
igor
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Re: IMX6UL asrc SAI clock source

manuel_soledge — Fri, 22 Nov 2019 09:31:38 GMT

Hi,

Thank you for the answer. However I now have some more questions and observations. There are clock numbers that appear on both tables 9-1 and 9-2 (asrck_clock_4, 7, c and d).

Also in table 9-1 it says that the 4-position mux is controlled by 2 bits in the IOMUX GPR0 register (bits 16:17, 18:19, 20:21 and 22:23) but looking at that register definition the bits are marked as reserved (see image below section 32.4.1 page 1475-1476).

By comparing the documentation with the one of the IMX6D/Q I saw that in the IMX6DQRM there are no duplicate clock numbers in tables 9-13/9-14 (ASRC Muxed Input Clocks/ASRC Direct Clocks page 502/503) which seems to make more sense to me.

Also in this reference manual the IOMUX GPR0 register is indeed used to configure the asrc input clocks.

Is it an error in the IMX6ULL reference manual GPR0 description? Or is table 9-1 Mux4:1 Control column wrong?

Thank you

Manuel BA