<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: IMX8MM 16 bit DDR4 training scripts  in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-16-bit-DDR4-training-scripts/m-p/1020709#M150968</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Andrew&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can look and try RPA (Register Programming Aid) tool and documentation&lt;/P&gt;&lt;P&gt;(Chapter 4 How to bring up a new MX8MSCALE board MSCALE_DDR_Tool_User_Guide.pdf)&lt;BR /&gt;included in DDR Test package&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" data-content-finding="Community" href="https://community.nxp.com/servlet/JiveServlet/download/340179-54-459577/MX8M_Mini_LPDDR4_RPA_v15.xlsx"&gt;MX8M_Mini_LPDDR4_RPA_v15.xlsx&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-340179"&gt;i.MX8 MSCALE SERIES DDR Tool Release (V2.10)&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Supported memories (post from Graeme Price Jun 28, 2019 7:04 AM) on&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/501975"&gt;iMX8M-Mini 4GB LPDDR4 RAM&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 07 Dec 2019 08:14:46 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2019-12-07T08:14:46Z</dc:date>
    <item>
      <title>IMX8MM 16 bit DDR4 training scripts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-16-bit-DDR4-training-scripts/m-p/1020707#M150966</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello!&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We build a custom board, where the PCIe and VPU IP cores are unconnected and unpowered.&lt;/P&gt;&lt;P&gt;The SAI1 is powered but all the IOs are unconnected.&lt;/P&gt;&lt;P&gt;The DDR memory is routed with the 16-bit data bus only.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Apparently, we found that the actual DDR training software provides no scripts for the 16-bit DDR4 memory.&lt;/P&gt;&lt;P&gt;The existing scripts/firmware hangs immediately after upload.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any chance it is an easy-to-solve issue?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Andrey.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 06 Dec 2019 22:02:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-16-bit-DDR4-training-scripts/m-p/1020707#M150966</guid>
      <dc:creator>andrewbushuev</dc:creator>
      <dc:date>2019-12-06T22:02:24Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MM 16 bit DDR4 training scripts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-16-bit-DDR4-training-scripts/m-p/1020708#M150967</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Some additional info: the IMX8M NANO works well on the same PCB, including the DDR training and so forth.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 06 Dec 2019 23:10:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-16-bit-DDR4-training-scripts/m-p/1020708#M150967</guid>
      <dc:creator>andrewbushuev</dc:creator>
      <dc:date>2019-12-06T23:10:25Z</dc:date>
    </item>
    <item>
      <title>Re: IMX8MM 16 bit DDR4 training scripts</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-16-bit-DDR4-training-scripts/m-p/1020709#M150968</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Andrew&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can look and try RPA (Register Programming Aid) tool and documentation&lt;/P&gt;&lt;P&gt;(Chapter 4 How to bring up a new MX8MSCALE board MSCALE_DDR_Tool_User_Guide.pdf)&lt;BR /&gt;included in DDR Test package&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" data-content-finding="Community" href="https://community.nxp.com/servlet/JiveServlet/download/340179-54-459577/MX8M_Mini_LPDDR4_RPA_v15.xlsx"&gt;MX8M_Mini_LPDDR4_RPA_v15.xlsx&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-340179"&gt;i.MX8 MSCALE SERIES DDR Tool Release (V2.10)&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Supported memories (post from Graeme Price Jun 28, 2019 7:04 AM) on&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/501975"&gt;iMX8M-Mini 4GB LPDDR4 RAM&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 07 Dec 2019 08:14:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/IMX8MM-16-bit-DDR4-training-scripts/m-p/1020709#M150968</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-12-07T08:14:46Z</dc:date>
    </item>
  </channel>
</rss>

