topic Re: i.MX8 LPDDR4 in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/i-MX8-LPDDR4/m-p/1012991#M150028 <HTML><HEAD></HEAD><BODY><P>Hi SANTOSH&nbsp;</P><P></P><P>both channels are equal, so seems change was made due to board routing convenience.</P><P></P><P>Best regards<BR />igor<BR />-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Thu, 05 Dec 2019 23:44:10 GMT igorpadykov 2019-12-05T23:44:10Z i.MX8 LPDDR4 https://community.nxp.com/t5/i-MX-Processors/i-MX8-LPDDR4/m-p/1012990#M150027 <HTML><HEAD></HEAD><BODY><P><SPAN style="font-size: 14.0pt;">Hello,</SPAN></P><P></P><P style="text-align: justify;"><SPAN style="font-size: 14.0pt;">We are using <STRONG>MIMX8MM3CVTKZAA </STRONG>in our design. In the EVK file of i.MX8 (SPF-31399), referring to DDR section, <STRONG>&nbsp;</STRONG>all the lines of Channel A of LPDDR4 is connected to Channel B of processor. For example pin H4(CS0_A) of LPDDR4 is connected to V4(CS0_B) of processor. Is it intentional? What is the reason behind this?</SPAN></P><P></P><P><SPAN style="font-size: 14.0pt;">Thanks &amp; Regards,</SPAN></P><P><SPAN style="font-size: 14.0pt;">Santosh Tuppad</SPAN></P></BODY></HTML> Thu, 05 Dec 2019 14:33:27 GMT https://community.nxp.com/t5/i-MX-Processors/i-MX8-LPDDR4/m-p/1012990#M150027 santosh_t 2019-12-05T14:33:27Z Re: i.MX8 LPDDR4 https://community.nxp.com/t5/i-MX-Processors/i-MX8-LPDDR4/m-p/1012991#M150028 <HTML><HEAD></HEAD><BODY><P>Hi SANTOSH&nbsp;</P><P></P><P>both channels are equal, so seems change was made due to board routing convenience.</P><P></P><P>Best regards<BR />igor<BR />-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Thu, 05 Dec 2019 23:44:10 GMT https://community.nxp.com/t5/i-MX-Processors/i-MX8-LPDDR4/m-p/1012991#M150028 igorpadykov 2019-12-05T23:44:10Z