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    <title>topic How to get eMMC 8-bit HS DDR fast boot mode working on iMX8MM in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010490#M149649</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We&amp;nbsp;are unable to get&amp;nbsp;fast boot mode with ack working on eMMC when configured for 8-bit hs DDR mode on our custom board. The eMMC hardware works&amp;nbsp;correctly&amp;nbsp;both after&amp;nbsp;loading u-boot through sdp&amp;nbsp;and when booting into Linux from there, but the boot ROM will not load u-boot from the eMMC, it will always fall back to serial download. It doesn't appear to fall back to normal boot mode either.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Our eMMC does support HS ddr @ 52MHz 1.8V. It is a v5.1 card, and should support everything needed for boot:&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Boot Information [BOOT_INFO: 0x07]&lt;/SPAN&gt;&lt;BR /&gt; &lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Device supports alternative boot method&lt;/SPAN&gt;&lt;BR /&gt; &lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Device supports dual data rate during boot&lt;/SPAN&gt;&lt;BR /&gt; &lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Device supports high speed timing during boot&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;mmc&amp;nbsp;extcsd has been set up, trying both through u-boot and through linux.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt; mmc partconf 0 1 1 0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt; mmc partconf 0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;EXT_CSD[179], PARTITION_CONFIG:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;BOOT_ACK: 0x1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;BOOT_PARTITION_ENABLE: 0x1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;PARTITION_ACCESS: 0x0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt;&amp;nbsp;mmc bootbus 0 2 0 2&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The ITB u-boot image&amp;nbsp;has been created just like&amp;nbsp;the&amp;nbsp;flash_evk_emmc_fastboot, and it works for sdp mode (has the correct header, etc). It is written&amp;nbsp;into mmcblk0boot0 at offset&amp;nbsp;0x400 bytes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I can also disable ack, clear ITB from 0x400, and&amp;nbsp;program the u-boot image to 0x8400 either to boot0 or boot1, but the boot ROM won't load u-boot in that case either. I think this should be the fall-back to normal mode?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is the fusing we have set up:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt; fuse read 1 3&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Reading bank 1:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Word 0x00000003: 180020e6&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;bt_fuse_sel [28] = 1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 1 - boot from fuses&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;boot device [14:12] = 010&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;010 - MMC/eMMC&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;port select (sd1) [11:10] = 0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;00 - uSDHC1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;power cycle enable [9] = 0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0 - no power cycle&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;SD Loopback Clock Source SEL sdr50/sdr104 [8] = 0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0 - through SD pad&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Fast Boot [7] = 1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;1 - Fast boot&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Bus Width [6:4] = 110&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 110 - 8-bit DDR (MMC 4.4)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Speed [3:2]: = 01&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 01 - High&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Voltage for normal boot&amp;nbsp;[1]: = 1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;1 - 1.8 V&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Voltage for mfr mode&amp;nbsp;[0]: = 0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 0 - 3.3&amp;nbsp;V&lt;/DIV&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt; fuse read 2 1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Reading bank 2:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Word 0x00000001: 00010700&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DLL enable [16] = 1&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;1 - Enable DLL for SD/eMMC&lt;/P&gt;&lt;P&gt;MMC_DLL_DLY [14:8] = 7&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;7 - slave delay target 7 (as used and confirmed in u-boot)&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt; fuse read 2 2&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Reading bank 2:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Word 0x00000002: 00000001&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Fast boot acknowlege disable [0] = 1&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;1 - Boot ack enabled&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is how we have the eMMC wired:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/76142iC7A4694D7AA0E1DB/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm not sure what else to try or check! By all accounts, it seems like boot from eMMC should work. Please help.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kurt&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 14 Jan 2020 22:00:21 GMT</pubDate>
    <dc:creator>kurt1</dc:creator>
    <dc:date>2020-01-14T22:00:21Z</dc:date>
    <item>
      <title>How to get eMMC 8-bit HS DDR fast boot mode working on iMX8MM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010490#M149649</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We&amp;nbsp;are unable to get&amp;nbsp;fast boot mode with ack working on eMMC when configured for 8-bit hs DDR mode on our custom board. The eMMC hardware works&amp;nbsp;correctly&amp;nbsp;both after&amp;nbsp;loading u-boot through sdp&amp;nbsp;and when booting into Linux from there, but the boot ROM will not load u-boot from the eMMC, it will always fall back to serial download. It doesn't appear to fall back to normal boot mode either.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Our eMMC does support HS ddr @ 52MHz 1.8V. It is a v5.1 card, and should support everything needed for boot:&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Boot Information [BOOT_INFO: 0x07]&lt;/SPAN&gt;&lt;BR /&gt; &lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Device supports alternative boot method&lt;/SPAN&gt;&lt;BR /&gt; &lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Device supports dual data rate during boot&lt;/SPAN&gt;&lt;BR /&gt; &lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Device supports high speed timing during boot&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;mmc&amp;nbsp;extcsd has been set up, trying both through u-boot and through linux.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt; mmc partconf 0 1 1 0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt; mmc partconf 0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;EXT_CSD[179], PARTITION_CONFIG:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;BOOT_ACK: 0x1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;BOOT_PARTITION_ENABLE: 0x1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;PARTITION_ACCESS: 0x0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt;&amp;nbsp;mmc bootbus 0 2 0 2&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The ITB u-boot image&amp;nbsp;has been created just like&amp;nbsp;the&amp;nbsp;flash_evk_emmc_fastboot, and it works for sdp mode (has the correct header, etc). It is written&amp;nbsp;into mmcblk0boot0 at offset&amp;nbsp;0x400 bytes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I can also disable ack, clear ITB from 0x400, and&amp;nbsp;program the u-boot image to 0x8400 either to boot0 or boot1, but the boot ROM won't load u-boot in that case either. I think this should be the fall-back to normal mode?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is the fusing we have set up:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt; fuse read 1 3&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Reading bank 1:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Word 0x00000003: 180020e6&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;bt_fuse_sel [28] = 1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 1 - boot from fuses&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;boot device [14:12] = 010&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;010 - MMC/eMMC&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;port select (sd1) [11:10] = 0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;00 - uSDHC1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;power cycle enable [9] = 0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0 - no power cycle&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;SD Loopback Clock Source SEL sdr50/sdr104 [8] = 0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;0 - through SD pad&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Fast Boot [7] = 1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;1 - Fast boot&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Bus Width [6:4] = 110&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 110 - 8-bit DDR (MMC 4.4)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Speed [3:2]: = 01&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 01 - High&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Voltage for normal boot&amp;nbsp;[1]: = 1&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;1 - 1.8 V&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Voltage for mfr mode&amp;nbsp;[0]: = 0&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 0 - 3.3&amp;nbsp;V&lt;/DIV&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt; fuse read 2 1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Reading bank 2:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Word 0x00000001: 00010700&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DLL enable [16] = 1&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;1 - Enable DLL for SD/eMMC&lt;/P&gt;&lt;P&gt;MMC_DLL_DLY [14:8] = 7&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;7 - slave delay target 7 (as used and confirmed in u-boot)&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;u-boot=&amp;gt; fuse read 2 2&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Reading bank 2:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'andale mono', monospace;"&gt;Word 0x00000002: 00000001&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Fast boot acknowlege disable [0] = 1&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;1 - Boot ack enabled&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is how we have the eMMC wired:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/76142iC7A4694D7AA0E1DB/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm not sure what else to try or check! By all accounts, it seems like boot from eMMC should work. Please help.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kurt&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Jan 2020 22:00:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010490#M149649</guid>
      <dc:creator>kurt1</dc:creator>
      <dc:date>2020-01-14T22:00:21Z</dc:date>
    </item>
    <item>
      <title>Re: How to get eMMC 8-bit HS DDR fast boot mode working on iMX8MM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010491#M149650</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Did you manage to resolve your above difficulties?&amp;nbsp;&lt;BR /&gt;I am working on a design which uses imx8mm with fast boot emmc boot, and so would appreciate any insight.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jan 2020 17:28:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010491#M149650</guid>
      <dc:creator>tom_perman</dc:creator>
      <dc:date>2020-01-15T17:28:42Z</dc:date>
    </item>
    <item>
      <title>Re: How to get eMMC 8-bit HS DDR fast boot mode working on iMX8MM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010492#M149651</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm still trying to figure this out, but&amp;nbsp;at the end of what I can determine on my own. I really need some help from NXP or someone else who's managed to get this to work.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jan 2020 17:37:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010492#M149651</guid>
      <dc:creator>kurt1</dc:creator>
      <dc:date>2020-01-15T17:37:17Z</dc:date>
    </item>
    <item>
      <title>Re: How to get eMMC 8-bit HS DDR fast boot mode working on iMX8MM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010493#M149652</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please check your spl.c under the board directory.&amp;nbsp; It&amp;nbsp;must&amp;nbsp;setup usdhc1 in board_mmc_init, since our imx8mm_evk does not use usdhc1, it only setups usdhc2 and usdhc3, you may refer to the imx8mq_evk, in this board it uses usdhc1 for emmc as in your design.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Also, you'll need to change board_mmc_get_env_dev" API according to board specific, like the following&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;int board_mmc_get_env_dev(int devno)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;{&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;return&amp;nbsp;devno;// - 1;&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;}&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hope this helps,&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Aldo.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt; Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 17 Jan 2020 18:29:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010493#M149652</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2020-01-17T18:29:37Z</dc:date>
    </item>
    <item>
      <title>Re: How to get eMMC 8-bit HS DDR fast boot mode working on iMX8MM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010494#M149653</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for the reply, Aldo. Yes, I am already doing this. Also, I've fixed up&amp;nbsp;spl_boot_device() to return&amp;nbsp;BOOT_DEVICE_MMC1 for&amp;nbsp;SD1_BOOT. The SPL&amp;nbsp;works properly when I load it from the serial downloader, and eMMC works from u-boot as expected.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Note that&amp;nbsp;it's not getting this far --&amp;nbsp;I don't get any output from my SPL at all so it seems that it's never&amp;nbsp;running. After about 15 seconds from POR, the usb device from the ROM serial downloader shows up instead.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kurt&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 17 Jan 2020 19:20:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-get-eMMC-8-bit-HS-DDR-fast-boot-mode-working-on-iMX8MM/m-p/1010494#M149653</guid>
      <dc:creator>kurt1</dc:creator>
      <dc:date>2020-01-17T19:20:45Z</dc:date>
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