topic Re: About SDRAM initialization sequence in i.MX Processors

About SDRAM initialization sequence

goto11 — Tue, 14 Jan 2020 10:00:52 GMT

Hello,Community

Register list of initialization sequence is described in section 9.2.4.7 of i.MX 7Dual Applications Processor Reference Manual, Rev. 1, 01/2018.
On the other hand, the initialization sequence of LPDDR3 device or JESD209-3C is as shown in the attached file.
Attachments include optional precharge ALL commands and CA training.
When the processing is performed according to the register list of the initialization sequence in section 9.2.4.7, are the options executed?

If options are not executed, can I add them?
If you can add an option, please tell me how.

best regards

Goto

Re: About SDRAM initialization sequence

Yuri — Wed, 15 Jan 2020 07:46:54 GMT

Hello,

It may be recommended to use https://community.nxp.com/docs/DOC-152468

Have a great day,

Yuri.

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Re: About SDRAM initialization sequence

goto11 — Wed, 15 Jan 2020 08:29:46 GMT

Hello,Yuri.

Could you tell me about the following questions?
I checked the reply above but couldn't understand.

Question excerpt

If options are not executed, can I add them?
If you can add an option, please tell me how.

best regards

Goto

Re: About SDRAM initialization sequence

Yuri — Mon, 20 Jan 2020 07:31:21 GMT

Hello,

The recommendation is to use the sequence in the Aid tool

(and the DDR Stress) - that is - the options are not needed.

Regards,

Yuri.