Transient response Measures

ban45 — Tue, 10 Mar 2020 09:28:40 GMT

Transient response occurs during boot and DDR3 operation.

Operation method for lowering transient response,

If you have the know-how of register setting, wouldn't it just teach you?

The following measures are taken.

The pattern is thicker.
The capacitor is increasing.

Re: Transient response Measures

igorpadykov — Tue, 10 Mar 2020 11:22:54 GMT

Hi Yasunori

>method for lowering transient response,

>If you have the know-how of register setting, wouldn't it just teach you

transients may be caused by strong signal, one can try to decrease drive

strength using DSE field in IOMUX pad register, described in AN5078

Influence of Pin Setting on System Function and Performance

For example for i.MX6Q sect.36.4.350 Pad Control Register
(IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK0_P)

i.MX 6Dual/6Quad Applications Processor Reference Manual

Also it may be caused by signal reflections, one can pay attention

to board layout, please check i.MX 6 Series Layout Recommendations

IMX6DQ6SDLHDG, Hardware Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors

Best regards
igor
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topic Re: Transient response Measures in i.MX Processors

Transient response Measures

Re: Transient response Measures