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    <title>i.MX Processors中的主题 Re: Using SRTM interface to virtually access GPIOs</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007042#M149233</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/nxf46838"&gt;nxf46838&lt;/A&gt;‌ can you confirm this also applies to the i.MX8SXL and i.MX8DXL?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks again,&lt;/P&gt;&lt;P&gt;Adam&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 02 Dec 2019 20:51:37 GMT</pubDate>
    <dc:creator>adam_loch</dc:creator>
    <dc:date>2019-12-02T20:51:37Z</dc:date>
    <item>
      <title>Using SRTM interface to virtually access GPIOs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007039#M149230</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We would like to be able to access GPIOs owned by the M4 on the A35 (Linux) using the SRTM service/APIs.&amp;nbsp; We have a demo application for SRTM which does "virtual" I2C access, and we just want to double-check if&amp;nbsp;similar functionality is possible with GPIOs.&amp;nbsp; If this possible, we'd also like to understand what the capabilities are with respect to this functionality (i.e. will it do interrupts, what is the latency, is there any documentation, etc).&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Nov 2019 15:06:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007039#M149230</guid>
      <dc:creator>adam_loch</dc:creator>
      <dc:date>2019-11-18T15:06:29Z</dc:date>
    </item>
    <item>
      <title>Re: Using SRTM interface to virtually access GPIOs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007040#M149231</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;1.-On i.MX8MM, both M4 core and A53 core can access the same module, e.g. i2c, gpio.&lt;/P&gt;&lt;P&gt;User needs to setup access permissions in XRDC setting.&lt;/P&gt;&lt;P&gt;Also,&amp;nbsp;user needs to make sure that both cores should avoid access confliction, that is, both cores should not access the same module at the same time.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;2.-If GPIOs are assigned to M4 only in your case, I think A53 can send msg to M4 for GPIO operations with RPMSG communication channel.&lt;/P&gt;&lt;P&gt;User can refer to ttyRPMSG, rpmsg ping-pong or rpmsg character device mechanism for this (User can find str echo and ping-pong examples in M4 SDK).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In all these ways, interrupt can be supported.&lt;/P&gt;&lt;P&gt;For interrupt latency, method 1 is definitely faster than method 2.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hope this helps,&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Aldo.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Nov 2019 00:12:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007040#M149231</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2019-11-26T00:12:51Z</dc:date>
    </item>
    <item>
      <title>Re: Using SRTM interface to virtually access GPIOs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007041#M149232</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you - this is helpful information.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Adam&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Dec 2019 16:16:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007041#M149232</guid>
      <dc:creator>adam_loch</dc:creator>
      <dc:date>2019-12-02T16:16:40Z</dc:date>
    </item>
    <item>
      <title>Re: Using SRTM interface to virtually access GPIOs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007042#M149233</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/nxf46838"&gt;nxf46838&lt;/A&gt;‌ can you confirm this also applies to the i.MX8SXL and i.MX8DXL?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks again,&lt;/P&gt;&lt;P&gt;Adam&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Dec 2019 20:51:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007042#M149233</guid>
      <dc:creator>adam_loch</dc:creator>
      <dc:date>2019-12-02T20:51:37Z</dc:date>
    </item>
    <item>
      <title>Re: Using SRTM interface to virtually access GPIOs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007043#M149234</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Yes, this should also be suitable for i.MX 8SXL &amp;amp; i.MX 8DXL.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Aldo.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Dec 2019 17:28:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Using-SRTM-interface-to-virtually-access-GPIOs/m-p/1007043#M149234</guid>
      <dc:creator>AldoG</dc:creator>
      <dc:date>2019-12-04T17:28:11Z</dc:date>
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