topic MIPI CSI Line Interrupt in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI-Line-Interrupt/m-p/1004235#M148836 <HTML><HEAD></HEAD><BODY><P>Hello,</P><P>I have a question about the LINE_END interrupt of the MIPI CSI of i.MX8Mmini.<BR />I set LINE_INTR of "Line Interrupt Ratio" to 0x1.<BR />In this case, when is the LINE_END interrupt timing of "Interrupt source register 1"?<BR />Is the size of the received data relevant?</P><P>Thanks.</P><P>Tetsuya.</P></BODY></HTML> Mon, 23 Mar 2020 15:42:54 GMT t-sugiyama 2020-03-23T15:42:54Z MIPI CSI Line Interrupt https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI-Line-Interrupt/m-p/1004235#M148836 <HTML><HEAD></HEAD><BODY><P>Hello,</P><P>I have a question about the LINE_END interrupt of the MIPI CSI of i.MX8Mmini.<BR />I set LINE_INTR of "Line Interrupt Ratio" to 0x1.<BR />In this case, when is the LINE_END interrupt timing of "Interrupt source register 1"?<BR />Is the size of the received data relevant?</P><P>Thanks.</P><P>Tetsuya.</P></BODY></HTML> Mon, 23 Mar 2020 15:42:54 GMT https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI-Line-Interrupt/m-p/1004235#M148836 t-sugiyama 2020-03-23T15:42:54Z Re: MIPI CSI Line Interrupt https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI-Line-Interrupt/m-p/1004236#M148837 <HTML><HEAD></HEAD><BODY><P>With this setting, the LINE_END interrupt will be raised each time the Line End packet is detected on a specific MIPI CSI lane.</P><P></P><P>Best Regards,<BR />Artur</P></BODY></HTML> Thu, 26 Mar 2020 11:24:07 GMT https://community.nxp.com/t5/i-MX-Processors/MIPI-CSI-Line-Interrupt/m-p/1004236#M148837 art 2020-03-26T11:24:07Z