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    <title>topic Re: TPM (SLB9670) initialization failed on i.MX8 ECSPI2 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003716#M148764</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/rohitdubey"&gt;rohitdubey&lt;/A&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It seems that&amp;nbsp;TPM IC is in reset mode. You can check the datasheet and see that it requires a active high to work in normal mode. For this you need to add the pinmux for reset pin in the "pinctrl_ecspi2" with internal pull-up. Once the TPM is in normal mode it should come out of "wait_startup".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Kunal&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 17 Feb 2020 11:46:39 GMT</pubDate>
    <dc:creator>kunalkotecha1</dc:creator>
    <dc:date>2020-02-17T11:46:39Z</dc:date>
    <item>
      <title>TPM (SLB9670) initialization failed on i.MX8 ECSPI2</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003715#M148763</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm working on getting the &lt;EM&gt;Infineon SLB9670&lt;/EM&gt; to work on the &lt;EM&gt;ECSPI2&lt;/EM&gt; bus of an &lt;EM&gt;IMX8MQ&lt;/EM&gt; processor on the &lt;EM&gt;4.19.35 kernel&lt;/EM&gt; built using Yocto. The device seems to get detected on the bus ( there's a "&lt;EM&gt;spi1.0&lt;/EM&gt;" node in the&amp;nbsp; &lt;EM&gt;/sys/bus/spi/devices&lt;/EM&gt; directory), but for some reason, it is never associated with the TPM module and hence fails to come up as a TPM in the &lt;EM&gt;/dev&lt;/EM&gt; directory.&lt;/P&gt;&lt;P&gt;After some &lt;EM&gt;printk&lt;/EM&gt; debugging, I noticed that it fails to detect the valid bit being set on the TPM ( in &lt;A href="https://github.com/torvalds/linux/blob/master/drivers/char/tpm/tpm_tis_core.c#L111"&gt;wait_startup (tpm_tis_core)&lt;/A&gt;) and therefore doesn't initialize the device any further.&lt;/P&gt;&lt;P&gt;Probing the signals, I do see TPM replying with 00 01, but module fails to detect this. All the other pins seem to be behaving as expected, so this seems like a device tree or kernel problem.&lt;/P&gt;&lt;P&gt;I'm at a loss of what else to try and would appreciate any suggestions on how to get it to work.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here's the device tree section, (originally taken from another &lt;A _jive_internal="true" href="https://community.nxp.com/thread/503074"&gt;post&lt;/A&gt;&amp;nbsp;and modified) :&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&lt;/P&gt;&lt;DIV style="color: #d4d4d4; background-color: #1e1e1e; font-weight: normal; font-size: 14px;"&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV style="background-color: #1e1e1e; font-weight: normal;"&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl_ecspi2: ecspi2grp {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;fsl,pins = &amp;lt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #b5cea8;"&gt;&amp;nbsp; &amp;nbsp; MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO&lt;/SPAN&gt; &lt;SPAN style="color: #b5cea8;"&gt;0x00000116&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #b5cea8;"&gt;&amp;nbsp; &amp;nbsp; MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI&lt;/SPAN&gt; &lt;SPAN style="color: #b5cea8;"&gt;0x00000116&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #b5cea8;"&gt;&amp;nbsp; &amp;nbsp; MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK&lt;/SPAN&gt; &lt;SPAN style="color: #b5cea8;"&gt;0x00001916&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #b5cea8;"&gt;&amp;nbsp; &amp;nbsp; MX8MM_IOMUXC_ECSPI2_SS0_ECSPI2_SS0&lt;/SPAN&gt; &lt;SPAN style="color: #b5cea8;"&gt;0x00000116&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;//&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;//&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;amp;ecspi2 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;pinctrl-names =&lt;/SPAN&gt; &lt;SPAN style="color: #ce9178;"&gt;"default"&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ecspi2&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;fsl,spi-num-chipselects = &amp;lt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;1&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;status =&lt;/SPAN&gt; &lt;SPAN style="color: #ce9178;"&gt;"okay"&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;#address-cells = &amp;lt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;1&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;#size-cells = &amp;lt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;0&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;tpm0: slb9670@0 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;nbsp; &amp;nbsp; compatible =&lt;/SPAN&gt; &lt;SPAN style="color: #ce9178;"&gt;"infineon,slb9670"&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;nbsp; &amp;nbsp; reg = &amp;lt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;0&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;nbsp; &amp;nbsp; spi-max-frequency = &amp;lt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;38000000&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;nbsp; &amp;nbsp; };&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The kernel modules we're using are tpm, tpm_tis_core and tpm_tis_spi and we're not using interrupts:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/103245iC3811ABAE354E84C/image-size/large?v=v2&amp;amp;px=999" title="Screenshot from 2020-02-10 11-11-59.png" alt="Screenshot from 2020-02-10 11-11-59.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'd truly appreciate if anyone can help figure out what we've done wrong and how to fix it. I'll be happy to provide any&amp;nbsp;further information.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Rohit&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 10 Feb 2020 12:39:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003715#M148763</guid>
      <dc:creator>rohitdubey</dc:creator>
      <dc:date>2020-02-10T12:39:18Z</dc:date>
    </item>
    <item>
      <title>Re: TPM (SLB9670) initialization failed on i.MX8 ECSPI2</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003716#M148764</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/rohitdubey"&gt;rohitdubey&lt;/A&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It seems that&amp;nbsp;TPM IC is in reset mode. You can check the datasheet and see that it requires a active high to work in normal mode. For this you need to add the pinmux for reset pin in the "pinctrl_ecspi2" with internal pull-up. Once the TPM is in normal mode it should come out of "wait_startup".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Kunal&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Feb 2020 11:46:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003716#M148764</guid>
      <dc:creator>kunalkotecha1</dc:creator>
      <dc:date>2020-02-17T11:46:39Z</dc:date>
    </item>
    <item>
      <title>Re: TPM (SLB9670) initialization failed on i.MX8 ECSPI2</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003717#M148765</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/kunal.kotecha@volansystech.com" rel="nofollow noopener noreferrer" target="_blank"&gt;kunal.kotecha@volansystech.com&lt;/A&gt;‌&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your reply. We found the issue and it seemed to be related to the way nxp processors handle the SPI Chip Select GPIO lines. From the &lt;A href="https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt" rel="nofollow noopener noreferrer" target="_blank"&gt;kernel documentation&lt;/A&gt; :&lt;/P&gt;&lt;PRE class=""&gt;&lt;CODE&gt;&lt;SPAN class=""&gt;-&lt;/SPAN&gt; cs&lt;SPAN class=""&gt;-&lt;/SPAN&gt;gpios &lt;SPAN class=""&gt;:&lt;/SPAN&gt; GPIOs to use as chip selects&lt;SPAN class=""&gt;,&lt;/SPAN&gt; see spi&lt;SPAN class=""&gt;-&lt;/SPAN&gt;bus&lt;SPAN class=""&gt;.&lt;/SPAN&gt;txt&lt;SPAN class=""&gt;.&lt;/SPAN&gt; &lt;STRONG&gt;While the native chip&lt;/STRONG&gt;
&lt;STRONG&gt;select lines can be used&lt;SPAN class=""&gt;,&lt;/SPAN&gt; they appear to always generate a pulse between each&lt;/STRONG&gt;
&lt;STRONG&gt;word of a transfer&lt;SPAN class=""&gt;.&lt;/SPAN&gt;  Most use cases will require GPIO based chip selects to&lt;/STRONG&gt;
&lt;STRONG&gt;generate a valid transaction&lt;SPAN class=""&gt;.&lt;/SPAN&gt;&lt;SPAN class=""&gt;‍‍‍‍&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;We declared the pin as a GPIO and it works as expected. For anyone else encountering the same issue, here's the working device tree entry:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;CODE&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/P&gt;&lt;DIV style="color: #d4d4d4; background-color: #1e1e1e; font-weight: normal; font-size: 14px;"&gt;&lt;DIV&gt;&lt;DIV style="background-color: #1e1e1e; font-weight: normal;"&gt;&lt;DIV&gt;&lt;SPAN&gt; pinctrl_ecspi2: ecspi2grp {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; fsl,pins = &amp;lt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO&lt;/SPAN&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;0x00000116&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI&lt;/SPAN&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;0x00000116&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK&lt;/SPAN&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;0x00001916&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt; };&lt;/SPAN&gt;&lt;/DIV&gt;//&lt;/DIV&gt;&lt;DIV style="background-color: #1e1e1e; font-weight: normal;"&gt;//&lt;/DIV&gt;&lt;DIV style="background-color: #1e1e1e; font-weight: normal;"&gt;&lt;DIV style="font-weight: normal;"&gt;&lt;DIV&gt;&lt;SPAN&gt; pinctrl_spi2_ss0: spi2_ss0 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;fsl,pins = &amp;lt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13&lt;/SPAN&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;0x116&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt; };&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV style="background-color: #1e1e1e; font-weight: normal;"&gt;//&lt;/DIV&gt;&lt;DIV style="background-color: #1e1e1e; font-weight: normal;"&gt;//&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;amp;ecspi2 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;nbsp; &amp;nbsp; pinctrl-names = &lt;/SPAN&gt;&lt;SPAN style="color: #ce9178;"&gt;"default"&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_ecspi2&amp;gt;, &amp;lt;&amp;amp;pinctrl_spi2_ss0&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;cs-gpios = &amp;lt;&amp;amp;gpio5 &lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;13&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt; &lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;0&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;status = &lt;/SPAN&gt;&lt;SPAN style="color: #ce9178;"&gt;"okay"&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;tpm0: slb9670@0 {&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;compatible = &lt;/SPAN&gt;&lt;SPAN style="color: #ce9178;"&gt;"infineon,slb9670"&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;reg = &amp;lt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;0&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt; &lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="background-color: #1e1e1e;"&gt;&amp;nbsp; &amp;nbsp;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;spi-max-frequency = &amp;lt;&lt;/SPAN&gt;&lt;SPAN style="color: #b5cea8;"&gt;38000000&lt;/SPAN&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;&amp;nbsp; &amp;nbsp; };&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN style="color: #d4d4d4;"&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&lt;CODE&gt;&lt;BR /&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; regards,&lt;/P&gt;&lt;P&gt;Rohit&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Feb 2020 16:17:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003717#M148765</guid>
      <dc:creator>rohitdubey</dc:creator>
      <dc:date>2020-02-24T16:17:15Z</dc:date>
    </item>
    <item>
      <title>Re: TPM (SLB9670) initialization failed on i.MX8 ECSPI2</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003718#M148766</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rohit,&lt;/P&gt;&lt;P&gt;my device tree is nearly identical to yours, but the spi-imx driver never attempts to communicate with the TPM (chip select stays high). I assume the problem is with my defconfig. I've included TCG_TPM, TCG_TIS_CORE, and TCG_TIS_SPI. Did you have to add anything else to get it working?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Nick&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jul 2020 00:46:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003718#M148766</guid>
      <dc:creator>nickbourdon</dc:creator>
      <dc:date>2020-07-08T00:46:03Z</dc:date>
    </item>
    <item>
      <title>Re: TPM (SLB9670) initialization failed on i.MX8 ECSPI2</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003719#M148767</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Nick,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For the modules, those modules were enough for me, all I had to do was make the modules autoload ( add them to /etc/modules-load.d/ ) at boot. Are you sure the modules are loaded when the board boots? Also, do you see any messages from the SPI bus being probed during boot?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Rohit&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 10 Jul 2020 09:02:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003719#M148767</guid>
      <dc:creator>rohitdubey</dc:creator>
      <dc:date>2020-07-10T09:02:49Z</dc:date>
    </item>
    <item>
      <title>Re: TPM (SLB9670) initialization failed on i.MX8 ECSPI2</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003720#M148768</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rohit,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks for your response. That is exactly what solved my problem. I'm building with Yocto so I just added the following line to my machine file and now everything comes up automatically.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;KERNEL_MODULE_AUTOLOAD += " tpm tpm_tis_core tpm_tis_spi "&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks again!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Nick&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 10 Jul 2020 16:17:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/TPM-SLB9670-initialization-failed-on-i-MX8-ECSPI2/m-p/1003720#M148768</guid>
      <dc:creator>nickbourdon</dc:creator>
      <dc:date>2020-07-10T16:17:13Z</dc:date>
    </item>
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