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    <title>topic ddr clock frequency in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998680#M148097</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="color: #51626f; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;Hi,&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;&lt;SPAN style="color: #51626f;"&gt;We have a custom board based on imx7d&amp;nbsp;&lt;/SPAN&gt;with DDR2 RAM. The current DDR2 RAM is&amp;nbsp;running at&amp;nbsp;533 MHz, but the DDR2 only support up to 400MHz.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;&lt;SPAN style="color: #51626f;"&gt;In t&lt;/SPAN&gt;he bootloader&amp;nbsp;we&amp;nbsp;select&amp;nbsp;clock&amp;nbsp;source use DRAM_ALT_CLK_ROOT and SYS_PLL_PFD0 and hereby the DDR phy clock&amp;nbsp;is running at&amp;nbsp;392Mhz.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;&lt;SPAN style="color: #51626f;"&gt;When the&amp;nbsp;&lt;/SPAN&gt;Linux kernel boot, the DRAM clock dead after&amp;nbsp;statement&amp;nbsp;clks[IMX7D_DRAM_ALT_ROOT_CLK] = imx_clk_gate4("dram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0) in&amp;nbsp;source file clk-imx7d.c.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;Looking forward for inputs.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="border: none; padding: 0cm; color: #51626f; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;Thanks,&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="border: none; padding: 0cm; color: #51626f; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;Jakob&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 21 Feb 2020 12:01:15 GMT</pubDate>
    <dc:creator>jdt</dc:creator>
    <dc:date>2020-02-21T12:01:15Z</dc:date>
    <item>
      <title>ddr clock frequency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998680#M148097</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="color: #51626f; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;Hi,&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;&lt;SPAN style="color: #51626f;"&gt;We have a custom board based on imx7d&amp;nbsp;&lt;/SPAN&gt;with DDR2 RAM. The current DDR2 RAM is&amp;nbsp;running at&amp;nbsp;533 MHz, but the DDR2 only support up to 400MHz.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;&lt;SPAN style="color: #51626f;"&gt;In t&lt;/SPAN&gt;he bootloader&amp;nbsp;we&amp;nbsp;select&amp;nbsp;clock&amp;nbsp;source use DRAM_ALT_CLK_ROOT and SYS_PLL_PFD0 and hereby the DDR phy clock&amp;nbsp;is running at&amp;nbsp;392Mhz.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;&lt;SPAN style="color: #51626f;"&gt;When the&amp;nbsp;&lt;/SPAN&gt;Linux kernel boot, the DRAM clock dead after&amp;nbsp;statement&amp;nbsp;clks[IMX7D_DRAM_ALT_ROOT_CLK] = imx_clk_gate4("dram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0) in&amp;nbsp;source file clk-imx7d.c.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;Looking forward for inputs.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="border: none; padding: 0cm; color: #51626f; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;Thanks,&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: none; font-weight: normal; margin-bottom: 0cm; padding: 0cm;"&gt;&lt;SPAN style="border: none; padding: 0cm; color: #51626f; font-size: medium; font-family: arial, helvetica, sans-serif; "&gt;Jakob&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Feb 2020 12:01:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998680#M148097</guid>
      <dc:creator>jdt</dc:creator>
      <dc:date>2020-02-21T12:01:15Z</dc:date>
    </item>
    <item>
      <title>Re: ddr clock frequency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998681#M148098</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; i.MX7D supports&amp;nbsp;DDR3 / DDR3L / LPDDR2 / LPDDR3 memory devices.&lt;/P&gt;&lt;P&gt;DDR2 is not supported.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 22 Feb 2020 09:13:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998681#M148098</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2020-02-22T09:13:14Z</dc:date>
    </item>
    <item>
      <title>Re: ddr clock frequency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998682#M148099</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;DIV style="color: #000000; border: 0px; font-weight: inherit; font-size: 12pt;"&gt;It is a&amp;nbsp;LPDDR2 SDRAM from Micron.&amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV style="color: #000000; border: 0px; font-weight: inherit; font-size: 12pt;"&gt;&lt;/DIV&gt;&lt;DIV style="color: #000000; border: 0px; font-weight: inherit; font-size: 12pt;"&gt;Regards,&lt;/DIV&gt;&lt;DIV style="color: #000000; border: 0px; font-weight: inherit; font-size: 12pt;"&gt;Jakob&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Feb 2020 07:39:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998682#M148099</guid>
      <dc:creator>jdt</dc:creator>
      <dc:date>2020-02-24T07:39:43Z</dc:date>
    </item>
    <item>
      <title>Re: ddr clock frequency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998683#M148100</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; What NXP (Linux) BSP is used in the case?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Mar 2020 09:16:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998683#M148100</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2020-03-11T09:16:40Z</dc:date>
    </item>
    <item>
      <title>Re: ddr clock frequency</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998684#M148101</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;It has been decided to use a another memory device. Thank you for replying.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Jakob&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Mar 2020 08:55:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/ddr-clock-frequency/m-p/998684#M148101</guid>
      <dc:creator>Jakobthomsen</dc:creator>
      <dc:date>2020-03-12T08:55:25Z</dc:date>
    </item>
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