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    <title>i.MX ProcessorsのトピックRe: SPI NOR FLASH BOOTING ISSUE</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/SPI-NOR-FLASH-BOOTING-ISSUE/m-p/997454#M147965</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;please check with jtag that correct boot settings were loaded in SRC_SBMR1,2 register,&lt;/P&gt;&lt;P&gt;they are described in sect.60.7.2 SRC Boot Mode Register 1 (SRC_SBMR1).&lt;/P&gt;&lt;P&gt;Also had you run ddr test, if not please run it&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-105652"&gt;https://community.nxp.com/docs/DOC-105652&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 23 Mar 2020 11:50:41 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2020-03-23T11:50:41Z</dc:date>
    <item>
      <title>SPI NOR FLASH BOOTING ISSUE</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SPI-NOR-FLASH-BOOTING-ISSUE/m-p/997451#M147962</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Team,&lt;/P&gt;&lt;P&gt;We are using imx6 processor and interfaced MX66L51235FZI SPI Nor flash. ECSPI3 SPI controller is used and following are lines which are connected.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;ECSPI3_SS0 -DISP0_DAT3.alt2&lt;/LI&gt;&lt;LI&gt;ECSPI3_CLK -&amp;nbsp;DISP0_DAT0.alt2&lt;/LI&gt;&lt;LI&gt;ECSPI3_MOSI-DISP0_DAT1.alt2&lt;/LI&gt;&lt;LI&gt;ECSPI3_MISO-&amp;nbsp;DISP0_DAT2.alt2&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Boot mode selected is BOOT_MODE[1:0] as 0x10 boot from internal mode option is selected.&lt;/P&gt;&lt;P&gt;Boot configuration pins for BOOT_CONFIG[1:4][7:0] when serial ROM and ECSPI3 controller are selected is shown below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;00110000&amp;nbsp; 00000000 00000000 00001010.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;With the above configuration and SPI NOR FLASH is preloaded with SPL of 1KB @ 0x400 address. When we switch on the board uboot doesn't appear we try to probe the DISPO_DAT0 (clk) line during power up we see no clock on the line.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please let us know whether our configuration is correct or not and are we missing anything?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Mar 2020 14:14:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SPI-NOR-FLASH-BOOTING-ISSUE/m-p/997451#M147962</guid>
      <dc:creator>suryakanta_moha</dc:creator>
      <dc:date>2020-03-20T14:14:42Z</dc:date>
    </item>
    <item>
      <title>Re: SPI NOR FLASH BOOTING ISSUE</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SPI-NOR-FLASH-BOOTING-ISSUE/m-p/997452#M147963</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Suryakanta&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;what processor used in the case (full part number)?&lt;/P&gt;&lt;P&gt;One can start with checking Reference Manual Boot Chapter if correct&lt;/P&gt;&lt;P&gt;mux options (sect."ECSPI IOMUX pin configuration") were used for ecspi boot.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Mar 2020 23:39:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SPI-NOR-FLASH-BOOTING-ISSUE/m-p/997452#M147963</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-03-20T23:39:53Z</dc:date>
    </item>
    <item>
      <title>Re: SPI NOR FLASH BOOTING ISSUE</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SPI-NOR-FLASH-BOOTING-ISSUE/m-p/997453#M147964</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for the reply.&lt;/P&gt;&lt;P&gt;The processor part no which we are using is&amp;nbsp;&amp;nbsp;MCIMX6D7CVT08AE and the SPI NOR FLASH part no is&amp;nbsp;MX66L51235FZ2I-10G sourced from Macronix.&lt;/P&gt;&lt;P&gt;We have referred Reference Manual document Boot chapter no 8 and section 8.5 specific for SPI NOR Flash boot configuration and set the following coniguration for BOOT PINS:&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; font-size: 14px;"&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; font-size: 14px;"&gt;1) Boot configuration pins for BOOT_CONFIG[1:4][7:0] when serial ROM and ECSPI3 controller are selected is shown below:&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; font-size: 14px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;00110000&amp;nbsp; 00000000 00000000 00001010.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; font-size: 14px;"&gt;&amp;nbsp;2) Boot mode selected is BOOT_MODE[1:0] as 0x10 boot from internal mode option is selected.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; font-size: 14px;"&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; font-size: 14px;"&gt;With the above configuration and SPI NOR FLASH is preloaded with SPL of 1KB @ 0x400 address. When we switch on the board uboot doesn't appear we try to probe the DISPO_DAT0 (clk) line during power up we see no clock on the line.&amp;nbsp;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px; font-size: 14px;"&gt;Could you please let us know whether our configuration is correct or not and are we missing anything?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Mar 2020 10:22:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SPI-NOR-FLASH-BOOTING-ISSUE/m-p/997453#M147964</guid>
      <dc:creator>suryakanta_moha</dc:creator>
      <dc:date>2020-03-23T10:22:43Z</dc:date>
    </item>
    <item>
      <title>Re: SPI NOR FLASH BOOTING ISSUE</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SPI-NOR-FLASH-BOOTING-ISSUE/m-p/997454#M147965</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;please check with jtag that correct boot settings were loaded in SRC_SBMR1,2 register,&lt;/P&gt;&lt;P&gt;they are described in sect.60.7.2 SRC Boot Mode Register 1 (SRC_SBMR1).&lt;/P&gt;&lt;P&gt;Also had you run ddr test, if not please run it&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-105652"&gt;https://community.nxp.com/docs/DOC-105652&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Mar 2020 11:50:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SPI-NOR-FLASH-BOOTING-ISSUE/m-p/997454#M147965</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-03-23T11:50:41Z</dc:date>
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