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    <title>topic Re: i.MX287 VDDA output current in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990625#M147030</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Igor:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I need more specific answers.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Do you mean the peak value of DDR load current should be under VDDA maximal output current and it is also acceptable even load current over the maximal value? And, what type of value is the maximal output current?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;When we use a platform on new products, EVK is very important that circuit design is based on it.&lt;/P&gt;&lt;P&gt;I can't understand&amp;nbsp;why NXP announced EVK even some parameters are out of specification.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So far, EVK works fine.&lt;/P&gt;&lt;P&gt;However, we need to design our application board.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Could you give suggestions how to modify EVK circuit to prevent possible failure caused due to out-of-specification parameters?&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 07 Feb 2020 01:48:53 GMT</pubDate>
    <dc:creator>jerry_fj_huang</dc:creator>
    <dc:date>2020-02-07T01:48:53Z</dc:date>
    <item>
      <title>i.MX287 VDDA output current</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990623#M147028</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, NXP:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Recently, I want to use i.MX287 for basic system network because the chip has integral PMU reducing complexity.&lt;/P&gt;&lt;P&gt;However, one parameter needs to be clarified.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;VDDA, which is the DDR source from i.MX287, can supply maximal 200mA for DDR2.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_3.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/102004iDEF26BA2D1EA70BD/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_3.png" alt="pastedImage_3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;After measuring current through R31 on i.MX28 EVK, RMS value is under 200mA but peak value is&amp;nbsp;around&amp;nbsp;560mA.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/102005i7A0BB5090F9EB7AE/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Ch1 is the voltage of VDDA_1V8, and Ch4 is the current through R31 on i.MX28 EVK.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_6.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/102122iA96019D0427B3B7F/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_6.png" alt="pastedImage_6.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What kind of value can stand for VDDA maximal output current? RMS, peak, average or else?&lt;/P&gt;&lt;P&gt;If this 200mA is RMS value, I can select W971G series which is same as i.MX287 EVK, and everything meets specification.&lt;/P&gt;&lt;P&gt;If this 200mA is peak value, I want to know the design concept of i.MX287 EVK. Why is this current value over specification?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Feb 2020 03:19:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990623#M147028</guid>
      <dc:creator>jerry_fj_huang</dc:creator>
      <dc:date>2020-02-06T03:19:55Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX287 VDDA output current</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990624#M147029</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jerry&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt; I want to know the design concept of i.MX287 EVK. Why is this current value over specification?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/102090i96849F55D798B816/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.jpg" alt="pastedImage_1.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Feb 2020 23:39:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990624#M147029</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-02-06T23:39:32Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX287 VDDA output current</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990625#M147030</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Igor:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I need more specific answers.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Do you mean the peak value of DDR load current should be under VDDA maximal output current and it is also acceptable even load current over the maximal value? And, what type of value is the maximal output current?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;When we use a platform on new products, EVK is very important that circuit design is based on it.&lt;/P&gt;&lt;P&gt;I can't understand&amp;nbsp;why NXP announced EVK even some parameters are out of specification.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So far, EVK works fine.&lt;/P&gt;&lt;P&gt;However, we need to design our application board.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Could you give suggestions how to modify EVK circuit to prevent possible failure caused due to out-of-specification parameters?&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Feb 2020 01:48:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990625#M147030</guid>
      <dc:creator>jerry_fj_huang</dc:creator>
      <dc:date>2020-02-07T01:48:53Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX287 VDDA output current</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990626#M147031</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jerry&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you can use EVK currents as reliable and verified by nxp.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Feb 2020 11:09:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990626#M147031</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-02-07T11:09:43Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX287 VDDA output current</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990627#M147032</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Igor:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you mean the EVK schematic circuit is reliable and verified?&lt;/P&gt;&lt;P&gt;Sorry, I did not make clear description.&lt;/P&gt;&lt;P&gt;What I really want to know is what I can use as reference design.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The peak value of DDR load current is out of the i.MX287 VDDA output maximal current, but the RMS value is within the maximal output.&lt;/P&gt;&lt;P&gt;I need to make sure there would be problem in the future, so clarify what type of the maximal output current is very important.&lt;/P&gt;&lt;P&gt;If there is no any confusion of EVK, then I will use EVK as reference design. Or, I think the EVK schematic circuit may have potential problems.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 10 Feb 2020 01:45:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990627#M147032</guid>
      <dc:creator>jerry_fj_huang</dc:creator>
      <dc:date>2020-02-10T01:45:01Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX287 VDDA output current</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990628#M147033</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;EVK schematic has not any problems and was verified by NXP.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 10 Feb 2020 05:37:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX287-VDDA-output-current/m-p/990628#M147033</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-02-10T05:37:22Z</dc:date>
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