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    <title>i.MX Processors中的主题 iMX8QM DDR Configuration</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX8QM-DDR-Configuration/m-p/985710#M146417</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to understand how to configure DDR for iMX8QM system.&lt;/P&gt;&lt;P&gt;Our board has 8Go of DDR4 which is more than the iMX8QM MEK board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How to configure the system to indicate additional RAM to initialize ?&lt;/P&gt;&lt;P&gt;How is the DDR configured ?&lt;/P&gt;&lt;P&gt;There are 2 channels, are they configured in interleaved mode ?&lt;/P&gt;&lt;P&gt;How the channel mapped to the memory region ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The SCFW porting kit has a number of tests that can be run. Some are relevant to DDR.&lt;/P&gt;&lt;P&gt;I am able to run the DDR and DRC test on iMX8QM MEK but the DDR stress test fails :&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;*** DDR Stress SC Test&lt;/P&gt;&lt;P&gt;Power up DRC 0&lt;BR /&gt;Power up DRC 1&lt;BR /&gt;Allocate memory&lt;BR /&gt;Init DDRC&lt;BR /&gt;board_init_ddr(1)&lt;BR /&gt;DDR frequency = 1596000000&lt;BR /&gt;board_init_ddr(0)&lt;BR /&gt;DDR frequency = 1596000000&lt;BR /&gt; Current DDR Clock rate: &lt;BR /&gt; - DRC controller0: 798000000Hz, -DDR0 PHY: 1596000000Hz&lt;BR /&gt; - DRC controller1: 798000000Hz, -DDR1 PHY: 1596000000Hz&lt;BR /&gt;The DDR stress test can run with an incrementing frequency or at a static freq&lt;BR /&gt;To run at a static freq, simply set the start freq and end freq to the same value&lt;/P&gt;&lt;P&gt;Enter desired START freq in MHz and in 50MHz increments, then hit enter.&lt;/P&gt;&lt;P&gt;For example, for 1GHz, enter 1000, for 850MHz, enter 850. &lt;BR /&gt;1596&lt;BR /&gt; The freq you entered was: 1596 MHz&lt;/P&gt;&lt;P&gt;Enter desired END freq in MHz and in 50MHz increments, then hit enter. &lt;BR /&gt;Make sure this is equal to or greater than start freq &lt;BR /&gt;1596&lt;BR /&gt; The freq you entered was: 1596 MHz&lt;/P&gt;&lt;P&gt;Do you want to run DDR Stress Test for simple loop or infintely (till failure)?&lt;BR /&gt;Type '0' for simple loop. Type '1' for infinte test&lt;BR /&gt;0&lt;/P&gt;&lt;P&gt;---------------------------- &lt;BR /&gt;DDR freq passed into function * 1000000: 1596000000&lt;/P&gt;&lt;P&gt;** pm_clock_enable error!, err 6&lt;BR /&gt;**Error occurred when trying to set DDR freq, re-start test&lt;/P&gt;&lt;P&gt;DDR Stress test ended due to detected data failure &lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Stan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 21 Jan 2020 13:47:51 GMT</pubDate>
    <dc:creator>sbertrand</dc:creator>
    <dc:date>2020-01-21T13:47:51Z</dc:date>
    <item>
      <title>iMX8QM DDR Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8QM-DDR-Configuration/m-p/985710#M146417</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to understand how to configure DDR for iMX8QM system.&lt;/P&gt;&lt;P&gt;Our board has 8Go of DDR4 which is more than the iMX8QM MEK board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How to configure the system to indicate additional RAM to initialize ?&lt;/P&gt;&lt;P&gt;How is the DDR configured ?&lt;/P&gt;&lt;P&gt;There are 2 channels, are they configured in interleaved mode ?&lt;/P&gt;&lt;P&gt;How the channel mapped to the memory region ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The SCFW porting kit has a number of tests that can be run. Some are relevant to DDR.&lt;/P&gt;&lt;P&gt;I am able to run the DDR and DRC test on iMX8QM MEK but the DDR stress test fails :&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;*** DDR Stress SC Test&lt;/P&gt;&lt;P&gt;Power up DRC 0&lt;BR /&gt;Power up DRC 1&lt;BR /&gt;Allocate memory&lt;BR /&gt;Init DDRC&lt;BR /&gt;board_init_ddr(1)&lt;BR /&gt;DDR frequency = 1596000000&lt;BR /&gt;board_init_ddr(0)&lt;BR /&gt;DDR frequency = 1596000000&lt;BR /&gt; Current DDR Clock rate: &lt;BR /&gt; - DRC controller0: 798000000Hz, -DDR0 PHY: 1596000000Hz&lt;BR /&gt; - DRC controller1: 798000000Hz, -DDR1 PHY: 1596000000Hz&lt;BR /&gt;The DDR stress test can run with an incrementing frequency or at a static freq&lt;BR /&gt;To run at a static freq, simply set the start freq and end freq to the same value&lt;/P&gt;&lt;P&gt;Enter desired START freq in MHz and in 50MHz increments, then hit enter.&lt;/P&gt;&lt;P&gt;For example, for 1GHz, enter 1000, for 850MHz, enter 850. &lt;BR /&gt;1596&lt;BR /&gt; The freq you entered was: 1596 MHz&lt;/P&gt;&lt;P&gt;Enter desired END freq in MHz and in 50MHz increments, then hit enter. &lt;BR /&gt;Make sure this is equal to or greater than start freq &lt;BR /&gt;1596&lt;BR /&gt; The freq you entered was: 1596 MHz&lt;/P&gt;&lt;P&gt;Do you want to run DDR Stress Test for simple loop or infintely (till failure)?&lt;BR /&gt;Type '0' for simple loop. Type '1' for infinte test&lt;BR /&gt;0&lt;/P&gt;&lt;P&gt;---------------------------- &lt;BR /&gt;DDR freq passed into function * 1000000: 1596000000&lt;/P&gt;&lt;P&gt;** pm_clock_enable error!, err 6&lt;BR /&gt;**Error occurred when trying to set DDR freq, re-start test&lt;/P&gt;&lt;P&gt;DDR Stress test ended due to detected data failure &lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Stan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 21 Jan 2020 13:47:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8QM-DDR-Configuration/m-p/985710#M146417</guid>
      <dc:creator>sbertrand</dc:creator>
      <dc:date>2020-01-21T13:47:51Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8QM DDR Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8QM-DDR-Configuration/m-p/985711#M146418</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Stan,&lt;/P&gt;&lt;P&gt;There exists a RPA Tool (RegisterProgrammingAid) for the DDR configuration (it's) an Excel Sheet. With this you can extract two files: *.cfg and *.ds.&lt;/P&gt;&lt;P&gt;With the ds you can run the NXP DDR Tool and with the cfg you have to build a new SCFW.&lt;/P&gt;&lt;P&gt;Pls. contact your NXP rep. for this files and tools.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This link might be useful, too: &lt;A href="https://community.nxp.com/docs/DOC-341872"&gt;https://community.nxp.com/docs/DOC-341872&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR,&lt;BR /&gt;Stefan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Feb 2020 08:40:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8QM-DDR-Configuration/m-p/985711#M146418</guid>
      <dc:creator>Stefan_ng</dc:creator>
      <dc:date>2020-02-12T08:40:53Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8QM DDR Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8QM-DDR-Configuration/m-p/985712#M146419</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We got the RPA and the stress test tool.&lt;/P&gt;&lt;P&gt;The new configuration for 8Gbyte has been made. Testing will be performed soon.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Stan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Feb 2020 08:17:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8QM-DDR-Configuration/m-p/985712#M146419</guid>
      <dc:creator>sbertrand</dc:creator>
      <dc:date>2020-02-17T08:17:00Z</dc:date>
    </item>
    <item>
      <title>Re: iMX8QM DDR Configuration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX8QM-DDR-Configuration/m-p/1249557#M171196</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/81607"&gt;@sbertrand&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Will you please provide the steps to DDR Test Calibration and DDR value initialization for IMX8QM board.&lt;/P&gt;</description>
      <pubDate>Mon, 22 Mar 2021 09:44:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX8QM-DDR-Configuration/m-p/1249557#M171196</guid>
      <dc:creator>vinothkumars</dc:creator>
      <dc:date>2021-03-22T09:44:21Z</dc:date>
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