topic Re: Regarding connection between SSI and AUDMUX in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982529#M145950 <HTML><HEAD></HEAD><BODY><P>Hi Yuji</P><P></P><P>interconnections are described in AN2628</P><P><A class="link-titled" href="https://www.nxp.com/docs/en/application-note/AN2628.pdf" title="https://www.nxp.com/docs/en/application-note/AN2628.pdf">https://www.nxp.com/docs/en/application-note/AN2628.pdf</A>&nbsp;</P><P></P><P>Best regards<BR />igor</P></BODY></HTML> Thu, 18 Jun 2020 08:26:22 GMT igorpadykov 2020-06-18T08:26:22Z Regarding connection between SSI and AUDMUX https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982525#M145946 <HTML><HEAD></HEAD><BODY><P style="color: #51626f; background-color: #ffffff; border: 0px;">Hi,&nbsp;</P><P style="color: #51626f; background-color: #ffffff; border: 0px;"></P><P style="color: #51626f; background-color: #ffffff; border: 0px;">Please let me make clear about below questions.</P><P style="color: #51626f; background-color: #ffffff; border: 0px;"></P><P style="color: #51626f; background-color: #ffffff; border: 0px;">&nbsp;1) Each SSIx(x=1,2,3)&nbsp;is included&nbsp;STCK/STFS/SRCK/SRFS/STXD/SRXD signal lines?</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">&nbsp;2) Each SSIx(<SPAN style="border: 0px; font-weight: inherit;">x=1,2,3)&nbsp;</SPAN>are connected to internal port 1/2/7 of AUDMUX. Is this understanding correct?</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">&nbsp;3) we can set port to port connection inside AUDMUX?(default configuration is below figure)</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">&nbsp;<span class="lia-inline-image-display-wrapper"><img src="https://community.nxp.com/t5/image/serverpage/image-id/100734i6C897B8E556237AF/image-size/large?v=v2&amp;px=999" title="pastedImage_8.png" alt="pastedImage_8.png" /></span></P><P style="color: #51626f; background-color: #ffffff; border: 0px;">&nbsp;Best regards,</P><P style="color: #51626f; background-color: #ffffff; border: 0px;">yuji</P></BODY></HTML> Tue, 04 Feb 2020 12:45:36 GMT https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982525#M145946 yuji_fuseki 2020-02-04T12:45:36Z Re: Regarding connection between SSI and AUDMUX https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982526#M145947 <HTML><HEAD></HEAD><BODY><P>Hi Yuji</P><P></P><P>1. yes</P><P>2. this depends on used processor, for example for i.MX6Q it is described in</P><P>Table 81. AUDMUX Port Allocation</P><P><A href="https://www.nxp.com/docs/en/data-sheet/IMX6DQCEC.pdf" target="_blank"><STRONG>i.MX 6Dual/6Quad Applications Processors for Consumer Products - Data Sheet</STRONG></A></P><P>3. right</P><P></P><P>Best regards<BR />igor<BR />-----------------------------------------------------------------------------------------------------------------------<BR />Note: If this post answers your question, please click the Correct Answer button. Thank you!<BR />-----------------------------------------------------------------------------------------------------------------------</P></BODY></HTML> Tue, 04 Feb 2020 23:25:06 GMT https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982526#M145947 igorpadykov 2020-02-04T23:25:06Z Re: Regarding connection between SSI and AUDMUX https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982527#M145948 <HTML><HEAD></HEAD><BODY><P>Hi, Igor</P><P></P><P>thanks for you explanation.</P><P>I understood.</P><P></P><P>Br,</P><P>yuji</P></BODY></HTML> Wed, 05 Feb 2020 06:00:01 GMT https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982527#M145948 yuji_fuseki 2020-02-05T06:00:01Z Re: Regarding connection between SSI and AUDMUX https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982528#M145949 <HTML><HEAD></HEAD><BODY><P>Dear Igor,&nbsp;</P><P></P><P>Please let me ask an additional question about relationship of signal name&nbsp;for each module;&nbsp;SSI, AUDMUX and&nbsp; IOMUX.</P><P>Below relationship about signal name is correct?</P><P>[SSI]&nbsp; &nbsp; &nbsp; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; [AUDMUX(x=3,4,5,6)]<SPAN>&nbsp; &nbsp; &nbsp; &nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp;</SPAN><SPAN>&nbsp; &nbsp; &nbsp;<SPAN>&nbsp;[IOMUX(x=3,4,5,6)]</SPAN></SPAN></P><P>1.STCK&nbsp; &nbsp; &nbsp;&lt;---------&gt;&nbsp; &nbsp; &nbsp;TxCLKx&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<SPAN>&nbsp;&lt;---------&gt;&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; AUDx_TXC</SPAN></P><P>2.STFS<SPAN>&nbsp; &nbsp; &nbsp;&lt;---------&gt;&nbsp; &nbsp; &nbsp;</SPAN>&nbsp;TxFSx<SPAN>&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;</SPAN><SPAN>&nbsp;&lt;---------&gt;&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; AUDx_TXFS</SPAN></P><P>3.STXD<SPAN>&nbsp; &nbsp; &nbsp;&lt;---------&gt;&nbsp; &nbsp; &nbsp;TxDx&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;&nbsp;<SPAN>&lt;---------&gt;&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; AUDx_TXD</SPAN></SPAN></P><P>4.SRCK<SPAN>&nbsp; &nbsp; &nbsp;&lt;---------&gt;&nbsp; &nbsp; </SPAN>&nbsp;RxCLKx<SPAN>&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;</SPAN><SPAN>&lt;---------&gt;&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; AUDx_RXC</SPAN></P><P>&nbsp;(network clk)</P><P>5.SRFS<SPAN>&nbsp; &nbsp; &nbsp;&lt;---------&gt;&nbsp; &nbsp; &nbsp;RxFSx&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<SPAN>&nbsp; &lt;---------&gt;&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; AUDx_RXFS</SPAN></SPAN></P><P>6.SRXD<SPAN>&nbsp; &nbsp; &nbsp;&lt;---------&gt;&nbsp; &nbsp; RxDx&nbsp;&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<SPAN>&nbsp; &nbsp;&lt;---------&gt;&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; AUDx_RXD</SPAN></SPAN></P><P>&nbsp;</P><P>Br,</P><P>Yuji</P></BODY></HTML> Thu, 18 Jun 2020 05:50:37 GMT https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982528#M145949 yuji_fuseki 2020-06-18T05:50:37Z Re: Regarding connection between SSI and AUDMUX https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982529#M145950 <HTML><HEAD></HEAD><BODY><P>Hi Yuji</P><P></P><P>interconnections are described in AN2628</P><P><A class="link-titled" href="https://www.nxp.com/docs/en/application-note/AN2628.pdf" title="https://www.nxp.com/docs/en/application-note/AN2628.pdf">https://www.nxp.com/docs/en/application-note/AN2628.pdf</A>&nbsp;</P><P></P><P>Best regards<BR />igor</P></BODY></HTML> Thu, 18 Jun 2020 08:26:22 GMT https://community.nxp.com/t5/i-MX-Processors/Regarding-connection-between-SSI-and-AUDMUX/m-p/982529#M145950 igorpadykov 2020-06-18T08:26:22Z