<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic About Power mode transitions in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/About-Power-mode-transitions/m-p/973038#M144840</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,Community&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;About Table 6-8Power mode transitions in i.MX 7 Dual Applications Processor Reference Manual&lt;BR /&gt;There is "Upon alarm_in assertion to '1'" in Normal ON to OFF, by button and Configuration with internal PMIC column.&lt;BR /&gt;Where is the register for alarm_in?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best reguards,&lt;/P&gt;&lt;P&gt;Goto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 26 Aug 2019 11:58:37 GMT</pubDate>
    <dc:creator>goto11</dc:creator>
    <dc:date>2019-08-26T11:58:37Z</dc:date>
    <item>
      <title>About Power mode transitions</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-Power-mode-transitions/m-p/973038#M144840</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,Community&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;About Table 6-8Power mode transitions in i.MX 7 Dual Applications Processor Reference Manual&lt;BR /&gt;There is "Upon alarm_in assertion to '1'" in Normal ON to OFF, by button and Configuration with internal PMIC column.&lt;BR /&gt;Where is the register for alarm_in?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best reguards,&lt;/P&gt;&lt;P&gt;Goto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Aug 2019 11:58:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-Power-mode-transitions/m-p/973038#M144840</guid>
      <dc:creator>goto11</dc:creator>
      <dc:date>2019-08-26T11:58:37Z</dc:date>
    </item>
    <item>
      <title>Re: About Power mode transitions</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-Power-mode-transitions/m-p/973039#M144841</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Goto&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;there is no register for alarm_in as this is internal signal, for&lt;/P&gt;&lt;P&gt;button power off configuration one can look at description of&lt;/P&gt;&lt;P&gt;SNVS_LP Control Register (LPCR) register.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 27 Aug 2019 01:05:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-Power-mode-transitions/m-p/973039#M144841</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-08-27T01:05:43Z</dc:date>
    </item>
  </channel>
</rss>

