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    <title>i.MX Processors中的主题 Re: interrupt not cleared</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/interrupt-not-cleared/m-p/972792#M144817</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor&lt;/P&gt;&lt;P&gt;Thanks for the answer&amp;nbsp;&lt;/P&gt;&lt;P&gt;but I'm still dont understand how the interrupt cleared at the ISR .&lt;/P&gt;&lt;P&gt;My issue is that the ISR is been called many times&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 28 Oct 2019 10:15:54 GMT</pubDate>
    <dc:creator>ronen_aharoni</dc:creator>
    <dc:date>2019-10-28T10:15:54Z</dc:date>
    <item>
      <title>interrupt not cleared</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/interrupt-not-cleared/m-p/972790#M144815</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm running on Imx6dq&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'v wrote simple char device&amp;nbsp; and I configured gpio1_1 operate as an interrupt&amp;nbsp;&lt;/P&gt;&lt;P&gt;here is my code&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;my issue is that the isr is been call more the 1 since it not ack&amp;nbsp;&lt;/P&gt;&lt;P&gt;what I'm doing wrong&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&amp;nbsp;&lt;/P&gt;&lt;P&gt;/*&lt;BR /&gt;//Taken from &lt;A href="https://stackoverflow.com/questions/15215865/netlink-sockets-in-c-using-the-3-x-linux-kernel?lq=1" target="test_blank"&gt;https://stackoverflow.com/questions/15215865/netlink-sockets-in-c-using-the-3-x-linux-kernel?lq=1&lt;/A&gt;&lt;/P&gt;&lt;P&gt;#include &amp;lt;linux/module.h&amp;gt;&lt;BR /&gt;#include &amp;lt;net/sock.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/netlink.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/skbuff.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/time.h&amp;gt;&lt;BR /&gt;#include &amp;lt;stddef.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/kernel.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/interrupt.h&amp;gt;&lt;BR /&gt;#include &amp;lt;asm/io.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/irq.h&amp;gt;&lt;BR /&gt;#include &amp;lt;asm/irq.h&amp;gt;//#include &amp;lt;stdlib.h&amp;gt;&lt;BR /&gt;#include &amp;lt;asm/gpio.h&amp;gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;#include &amp;lt;linux/module.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/version.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/delay.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/irq.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/interrupt.h&amp;gt;&lt;BR /&gt;#include &amp;lt;linux/completion.h&amp;gt;&lt;BR /&gt;//#include &amp;lt;mach/hardware.h&amp;gt;&lt;BR /&gt;#include &amp;lt;asm/gpio.h&amp;gt;&lt;/P&gt;&lt;P&gt;#define __WORDSIZE 0&lt;/P&gt;&lt;P&gt;#ifndef __uint32_t_defined&lt;BR /&gt;typedef unsigned int uint32_t;&lt;BR /&gt;# define __uint32_t_defined&lt;BR /&gt;#endif&lt;BR /&gt;/* Unsigned. */&lt;BR /&gt;typedef unsigned char uint_fast8_t;&lt;BR /&gt;#if __WORDSIZE == 64&lt;BR /&gt;typedef unsigned long int uint_fast16_t;&lt;BR /&gt;typedef unsigned long int uint_fast32_t;&lt;BR /&gt;typedef unsigned long int uint_fast64_t;&lt;BR /&gt;#else&lt;BR /&gt;typedef unsigned int uint_fast16_t;&lt;BR /&gt;typedef unsigned int uint_fast32_t;&lt;BR /&gt;__extension__&lt;BR /&gt;typedef unsigned long long int uint_fast64_t;&lt;BR /&gt;#endif&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#define FUNC_GPIO 0x5&lt;BR /&gt;#define MAX_SIZE (PAGE_SIZE * 2) /* max size mmaped to userspace */&lt;/P&gt;&lt;P&gt;#define NETLINK_USER 31&lt;/P&gt;&lt;P&gt;static char *sh_mem = NULL;&lt;/P&gt;&lt;P&gt;struct sock *nl_sk = NULL;&lt;BR /&gt;struct timeval tvStart ;&lt;BR /&gt;struct timeval tvStop ;&lt;BR /&gt;//float f1 ;&lt;BR /&gt;unsigned int base_addr = 0x02000000;&lt;BR /&gt;unsigned int base_offs = 0x00000000;&lt;BR /&gt;void* gpioAddr = 0 ;&lt;BR /&gt;ssize_t page_size = (1024*1024);&lt;/P&gt;&lt;P&gt;enum function_t {&lt;BR /&gt; FUNCTION_UNKNOWN = 0,&lt;BR /&gt; FUNCTION_DIGITAL = 2,&lt;BR /&gt; FUNCTION_ANALOG = 4,&lt;BR /&gt; FUNCTION_I2C = 16,&lt;BR /&gt; FUNCTION_INTERRUPT = 32&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;enum pinmode_t {&lt;BR /&gt; PINMODE_NOT_SET = 0,&lt;BR /&gt; PINMODE_INPUT = 2,&lt;BR /&gt; PINMODE_OUTPUT = 4,&lt;BR /&gt; PINMODE_INTERRUPT = 8&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;enum isr_mode_t {&lt;BR /&gt; ISR_MODE_UNKNOWN = 0,&lt;BR /&gt; ISR_MODE_RISING = 2,&lt;BR /&gt; ISR_MODE_FALLING = 4,&lt;BR /&gt; ISR_MODE_BOTH = 8,&lt;BR /&gt; ISR_MODE_NONE = 16&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;enum isr_mode_t_driver&lt;BR /&gt;{&lt;BR /&gt; LOW_LEVEL = 0x00 , //LOW_LEVEL — Interrupt n is low-level sensitive.&lt;BR /&gt; HIGH_LEVEL = 0x01 , //HIGH_LEVEL — Interrupt n is high-level sensitive.&lt;BR /&gt; RISING_EDGE = 0x10 , //RISING_EDGE — Interrupt n is rising-edge sensitive.&lt;BR /&gt; FALLING_EDGE = 0x11 , //FALLING_EDGE — Interrupt n is falling-edge sensitive.&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;enum pud&lt;BR /&gt;{&lt;BR /&gt; // Pull up/down/none&lt;/P&gt;&lt;P&gt;PUD_OFF = 0 ,&lt;BR /&gt; PUD_DOWN = 1 ,&lt;BR /&gt; PUD_UP = 2&lt;/P&gt;&lt;P&gt;};&lt;BR /&gt;enum intMask&lt;BR /&gt;{&lt;BR /&gt; MASK = 0 ,&lt;BR /&gt; UNMASK = 1 ,&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;enum digital_value_t {&lt;BR /&gt; LOW,&lt;BR /&gt; HIGH&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;enum gpioRegOffset {&lt;BR /&gt; DR = 0x0 , // Data Register&lt;BR /&gt; GDIR = 0x4 , // Direction Register&lt;BR /&gt; PSR = 0x8 , // Status Register&lt;BR /&gt; ICR1 = 0xC , // Interrupt Configuration Register1&lt;BR /&gt; ICR2 = 0x10 , // Interrupt Configuration Register2&lt;BR /&gt; IMR = 0x14 , // Interrupt Mask Register&lt;BR /&gt; ISR = 0x18 , // Interrupt Status Register&lt;BR /&gt; EDGE_SEL = 0x1C , // Edge Select Register&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void soc_writel(uintptr_t addr, uint32_t val)&lt;BR /&gt;{&lt;BR /&gt; writel(val, (volatile void *)addr );&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;uint32_t soc_readl(uintptr_t addr)&lt;BR /&gt;{&lt;BR /&gt; return readl((const volatile void *)addr);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;#define RONENDEV_MAJOR 190&lt;BR /&gt;int irqNo = 0 ;&lt;/P&gt;&lt;P&gt;static int gpio_num;&lt;/P&gt;&lt;P&gt;DECLARE_COMPLETION(work);&lt;BR /&gt;int static counter = 0 ;&lt;/P&gt;&lt;P&gt;static irqreturn_t handler (int irq, void * dev)&lt;BR /&gt;{&lt;BR /&gt; void* addrDatISR = NULL ;//( gpioAddr + ISR );&lt;BR /&gt; void* addrDatStatus = NULL ;//( gpioAddr + PSR );&lt;BR /&gt; uint32_t valIMR = 0x2 ;&lt;BR /&gt; uint32_t valStatus = 0 ;&lt;/P&gt;&lt;P&gt;addrDatISR = (void*)( gpioAddr + 0x9C000 + ISR );//( gpioAddr + ISR ); valStatus = ioread32( addrDatStatus );&lt;BR /&gt; addrDatStatus = (void*)( gpioAddr + 0x9C000 + PSR );//( gpioAddr + PSR ); printk("Status 0x%08X Occurred aaa 0x%08lX\n" , valStatus, ( unsigned long ) addrDatISR );&lt;/P&gt;&lt;P&gt;valStatus = ioread32( addrDatStatus );&lt;/P&gt;&lt;P&gt;iowrite32( 0x02 , addrDatISR );&lt;/P&gt;&lt;P&gt;valStatus = ioread32( addrDatStatus );&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; complete_all(&amp;amp;work);&lt;BR /&gt; return IRQ_HANDLED;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;static int __init hello_init(void)&lt;BR /&gt;{&lt;BR /&gt; int status;&lt;BR /&gt; printk("Entering: %s\n",__FUNCTION__);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; gpioAddr = ioremap( 0x2000000 , page_size );&lt;BR /&gt; if( gpioAddr )&lt;BR /&gt; printk("success to virutal mem \n");&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; init_completion(&amp;amp;work);&lt;/P&gt;&lt;P&gt;gpio_num = 1;&lt;/P&gt;&lt;P&gt;status = gpio_request(gpio_num, "gpio_test\n");&lt;/P&gt;&lt;P&gt;if (status &amp;lt; 0)&lt;BR /&gt; {&lt;BR /&gt; printk("ERROR can not open GPIO %d\n", gpio_num);&lt;BR /&gt; return status;&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;gpio_direction_input(gpio_num);&lt;BR /&gt; gpio_export(gpio_num, true);&lt;/P&gt;&lt;P&gt;if(gpio_get_value(gpio_num) == 0)&lt;BR /&gt; printk("OFF. \n\tWaiting for the pin to be on..\n");&lt;BR /&gt; else&lt;BR /&gt; printk("ON. \n\tWaiting for the pin to be off..\n");&lt;/P&gt;&lt;P&gt;irqNo = gpio_to_irq(gpio_num);&lt;BR /&gt; printk("gpio %d has irq %d \n" , gpio_num , irqNo );&lt;/P&gt;&lt;P&gt;status = request_irq(irqNo, handler, 0, "gpio_test", NULL);&lt;BR /&gt; if(status &amp;lt; 0)&lt;BR /&gt; {&lt;BR /&gt; printk(KERN_ERR "error %d requesting GPIO IRQ %d\n", status, gpio_num);&lt;BR /&gt; return status;&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;irq_set_irq_type(irqNo, IRQ_TYPE_EDGE_RISING);&lt;/P&gt;&lt;P&gt;wait_for_completion_interruptible(&amp;amp;work);&lt;/P&gt;&lt;P&gt;printk(".. done counter %d \n");&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;return 0;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;static void __exit hello_exit(void)&lt;BR /&gt;{&lt;/P&gt;&lt;P&gt;free_irq(gpio_to_irq(gpio_num), NULL);&lt;BR /&gt; gpio_free(gpio_num);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;module_init(hello_init);&lt;BR /&gt;module_exit(hello_exit);&lt;/P&gt;&lt;P&gt;MODULE_LICENSE("GPL");&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 27 Oct 2019 15:18:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/interrupt-not-cleared/m-p/972790#M144815</guid>
      <dc:creator>ronen_aharoni</dc:creator>
      <dc:date>2019-10-27T15:18:30Z</dc:date>
    </item>
    <item>
      <title>Re: interrupt not cleared</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/interrupt-not-cleared/m-p/972791#M144816</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ronen&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for gpio interrupt one can look at touchscreen drivers examples, like&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://patchwork.kernel.org/patch/1293451/" title="https://patchwork.kernel.org/patch/1293451/"&gt;[v2,1/2] Input: egalax_ts: get gpio from devicetree node - Patchwork&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Oct 2019 05:21:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/interrupt-not-cleared/m-p/972791#M144816</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-10-28T05:21:05Z</dc:date>
    </item>
    <item>
      <title>Re: interrupt not cleared</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/interrupt-not-cleared/m-p/972792#M144817</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor&lt;/P&gt;&lt;P&gt;Thanks for the answer&amp;nbsp;&lt;/P&gt;&lt;P&gt;but I'm still dont understand how the interrupt cleared at the ISR .&lt;/P&gt;&lt;P&gt;My issue is that the ISR is been called many times&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Oct 2019 10:15:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/interrupt-not-cleared/m-p/972792#M144817</guid>
      <dc:creator>ronen_aharoni</dc:creator>
      <dc:date>2019-10-28T10:15:54Z</dc:date>
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