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    <title>i.MX ProcessorsのトピックInternal pull-ups on i.MX6 Solo X processor.</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Internal-pull-ups-on-i-MX6-Solo-X-processor/m-p/971118#M144633</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are trying to find out the internal pull-up resistors on the IMX6 processor.&lt;/P&gt;&lt;P&gt;From the data sheet it is not clear whether there are any pull-ups present inside the processor on SDIO lines(0:6)&lt;/P&gt;&lt;P&gt;D0-D3 including the CMD and CLOCK lines.&lt;/P&gt;&lt;P&gt;We are designing a system with a peripheral which is running in high speed SDIO mode connected to imx6 processor which needs to take into account the voltage levels achieved on these lines.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 25 Jul 2019 14:22:22 GMT</pubDate>
    <dc:creator>achyut_hegde</dc:creator>
    <dc:date>2019-07-25T14:22:22Z</dc:date>
    <item>
      <title>Internal pull-ups on i.MX6 Solo X processor.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-pull-ups-on-i-MX6-Solo-X-processor/m-p/971118#M144633</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are trying to find out the internal pull-up resistors on the IMX6 processor.&lt;/P&gt;&lt;P&gt;From the data sheet it is not clear whether there are any pull-ups present inside the processor on SDIO lines(0:6)&lt;/P&gt;&lt;P&gt;D0-D3 including the CMD and CLOCK lines.&lt;/P&gt;&lt;P&gt;We are designing a system with a peripheral which is running in high speed SDIO mode connected to imx6 processor which needs to take into account the voltage levels achieved on these lines.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Jul 2019 14:22:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-pull-ups-on-i-MX6-Solo-X-processor/m-p/971118#M144633</guid>
      <dc:creator>achyut_hegde</dc:creator>
      <dc:date>2019-07-25T14:22:22Z</dc:date>
    </item>
    <item>
      <title>Re: Internal pull-ups on i.MX6 Solo X processor.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Internal-pull-ups-on-i-MX6-Solo-X-processor/m-p/971119#M144634</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Achyut Hegde,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can find the pull resistor enablement and options on the pad configuration registers on the i.MX6SX Reference Manual (link below, you may need to login to download this document).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX6SXRM"&gt;https://www.nxp.com/webapp/Download?colCode=IMX6SXRM&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The properties would be PKE (Pull/Keep Enable Field), PUE (Pull/Keep Select Field) and PUS (Pull Up/Down Config. Field).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this helps!&lt;BR /&gt; Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 26 Jul 2019 20:17:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Internal-pull-ups-on-i-MX6-Solo-X-processor/m-p/971119#M144634</guid>
      <dc:creator>gusarambula</dc:creator>
      <dc:date>2019-07-26T20:17:44Z</dc:date>
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