i.MX ProcessorsのトピックRe: HDMI clock gating

HDMI clock gating

nirmalluhana — Tue, 10 Sep 2019 12:52:37 GMT

Hello,

Release: Yocto-Sumo (4.14.78_1.0.0_GA)

Board: i.MX8MQ based custom board

We are getting radiation from our board at 297 & 594 MHz frequencies, which is used by HDMI interface.

We want to disable DISPLAY_HDMI_CLK_ROOT on our board to stop the radiation of above frequencies. We already disabled HDMI interface from dts file.

Although, we are getting above clock frequencies and it is radiating due to PLL in the processor.

How we can completely disable the DISPLAY_HDMI_CLK_ROOT from PLL?

Best regards,

Nirmal

Re: HDMI clock gating

igorpadykov — Wed, 11 Sep 2019 00:09:50 GMT

Hi NIRMAL

for disabling HDMI clocks one can try to use CCGR gating control (CCM_CCGR95, CCM_CCGR94),

described in Table 5-9. CCGR Mapping Table

i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual

Best regards
igor
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Re: HDMI clock gating

nirmalluhana — Wed, 11 Sep 2019 04:37:52 GMT

Hello Igor,

Thanks for your rapid response.

Can you please provide more information from where I can access these registers to override the values?

Best regards,

Nirmal

Re: HDMI clock gating

igorpadykov — Wed, 11 Sep 2019 07:38:21 GMT

Hi Nirmal

imx8mq_evk.c\imx8mq_evk\freescale\board - uboot-imx - i.MX U-Boot

or clk-imx8mq.c\imx\clk\drivers - linux-imx - i.MX Linux kernel

Best regards
igor

Re: HDMI clock gating

nirmalluhana — Wed, 11 Sep 2019 11:53:45 GMT

Hello Igor,

Thanks for updates.

I didn't found clock source used for HDMI interface in the above-mentioned files.

Can you please provide which configurations I have to change to disable HDMI clock?

Best regards,

Nirmal

Re: HDMI clock gating

igorpadykov — Wed, 11 Sep 2019 13:20:31 GMT

Hi Nirmal

one can printf ccm registers to find clock source.

Best regards
igor

Re: HDMI clock gating

nirmalluhana — Wed, 18 Sep 2019 08:59:28 GMT

Hello Igor,

Thanks for your response.

As per the "fsl-imx8mq.dtsi" file there is no HDMI specific clock is used for HDMI interface. It is used DCSS node clocks for HDMI interface.

So, how I can disable HDMI(CCM_CCGR94) & HDMI PHY(CCM_CCGR95) clocks?

In the above clock source file, there is information about display clocks which is used for the DCSS source. If I disable the clocks from that source file my new built kernel crashes while board boot up.

Can you please provide the solution to disable HDMI interface clock?

Best regards,

Nirmal

Re: HDMI clock gating

igorpadykov — Wed, 18 Sep 2019 10:36:59 GMT

Hi Nirmal

>can you please provide the solution to disable HDMI interface clock?

suggest to build minimal image as described in Table 1. i.MX Yocto project images

attached Yocto Guide. Seems DCSS uses HDMI clock, so it is necessary to disable DCSS

also, use LCDIF instead:

fsl-imx8mq-evk-lcdif-adv7535.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel

&dcss {
status = "disabled";
};

&hdmi {
status = "disabled";
};

Best regards
igor

Re: HDMI clock gating

nirmalluhana — Tue, 24 Sep 2019 09:55:02 GMT

Hello Igor,

Thanks for your response.

I have disabled both the "dcss" & "hdmi" nodes in the dts file. But still, I am getting the radiation at 297 & 594 MHz frequencies. I think it is generated out from PLL of video clock.

I have also commented the line "clk_set_rate(clks[IMX8MQ_VIDEO_PLL1], 593999999);" in "drivers/clk/imx/clk-imx8mq.c" clock source file which is set the clock frequency at 594 MHz. But, it is not worked.

So, Is there any other changes I have to take care to disable HDMI interface clock?

Best regards,

Nirmal

Re: HDMI clock gating

igorpadykov — Tue, 24 Sep 2019 13:12:25 GMT

Hi Nirmal

to trace source of noise one can attach jtag and set PLL_BYPASS bit

in CCM_ANALOG_x_PLLn_CFG0 registers, check if radiation persists.

Best regards
igor