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    <title>topic About GPIO1 source INT0-INT7 interrupt requests in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/About-GPIO1-source-INT0-INT7-interrupt-requests/m-p/970374#M144573</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,community&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is the correspondence between INT7 to INT0 and GPIO1pin from IRQ56 to IRQ63 in Table 7-1 as follows?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;IRQ56 INT7 GPIO1_IO07pin&lt;BR /&gt;IRQ57 INT6 GPIO1_IO06pin&lt;BR /&gt;...&lt;BR /&gt;IRQ63 INT0 GPIO1_IO00pin&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is the interrupt with the higher priority the smaller the IRQ number?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;BR /&gt;Goto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 08 Aug 2019 10:45:01 GMT</pubDate>
    <dc:creator>goto11</dc:creator>
    <dc:date>2019-08-08T10:45:01Z</dc:date>
    <item>
      <title>About GPIO1 source INT0-INT7 interrupt requests</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-GPIO1-source-INT0-INT7-interrupt-requests/m-p/970374#M144573</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,community&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is the correspondence between INT7 to INT0 and GPIO1pin from IRQ56 to IRQ63 in Table 7-1 as follows?&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;IRQ56 INT7 GPIO1_IO07pin&lt;BR /&gt;IRQ57 INT6 GPIO1_IO06pin&lt;BR /&gt;...&lt;BR /&gt;IRQ63 INT0 GPIO1_IO00pin&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is the interrupt with the higher priority the smaller the IRQ number?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;BR /&gt;Goto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 08 Aug 2019 10:45:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-GPIO1-source-INT0-INT7-interrupt-requests/m-p/970374#M144573</guid>
      <dc:creator>goto11</dc:creator>
      <dc:date>2019-08-08T10:45:01Z</dc:date>
    </item>
    <item>
      <title>Re: About GPIO1 source INT0-INT7 interrupt requests</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/About-GPIO1-source-INT0-INT7-interrupt-requests/m-p/970375#M144574</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV class=""&gt;&lt;P&gt;Hi Goto&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;your understanding about correspondence is correct.&lt;/P&gt;&lt;P&gt;Also yes, interrupt with the higher priority the smaller the IRQ number.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Aug 2019 23:04:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/About-GPIO1-source-INT0-INT7-interrupt-requests/m-p/970375#M144574</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-08-12T23:04:25Z</dc:date>
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