topic Re: TCM share 256KB space issue in i.MX Processors

TCM share 256KB space issue

双朋赵 — Wed, 25 Sep 2019 03:25:25 GMT

hello, everyone,

in i.MX8x/i.MX8 MEK, we found that the TCML is the CM4 code bus and the default size is 128K. the TCMU is the system bus and the default size is also 128K.

MIMX8QM6xxxFF_cm4_core1_ram.ld ：

m_interrupts (RX) : ORIGIN = 0x1FFE0000, LENGTH = 0x00000A00

m_text (RX) : ORIGIN = 0x1FFE0A00, LENGTH = 0x0001F600

m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000

but the address range is continuous, can we rearrange the default size for data segment and code segment, for example, the data segment size is 128K + 32K, the code segment size is 128K - 32K and vice versa ? if possible, can you help us to prepare a demo and provide us the source code ?

Re: TCM share 256KB space issue

igorpadykov — Wed, 25 Sep 2019 08:51:28 GMT

Hi zhao

>can we rearrange the default size for data segment and code segment, for example,

>the data segment size is 128K + 32K, the code segment size is 128K - 32K and vice versa ?

yes

>if possible, can you help us to prepare a demo and provide us the source code ?

this can be done using extended support with Commercial Support and Engineering Services | NXP

Best regards
igor
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