Setting SAI Clock Source

david_ochs1 — Mon, 10 Jun 2019 03:39:33 GMT

I am trying to change the SAI1_MCLK frequency on an i.MX8M Mini EVK. From my device tree entries below, I expected to get sai1_div = 24 MHz

&sai1 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
assigned-clocks = <&clk IMX8MM_CLK_SAI1_SRC>,
<&clk IMX8MM_CLK_SAI1_DIV>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <0>, <24000000>;
status = "okay";
};

&clk {
assigned-clocks = <&clk IMX8MM_AUDIO_PLL1>, <&clk IMX8MM_AUDIO_PLL2>;
assigned-clock-rates = <768000000>, <768000000>;
};

Instead I see this from cat /sys/kernel/debug/clk/clk_summary | grep sai:

sai1_src 0 0 722534399 0 0
sai1_cg 0 0 722534399 0 0
sai1_pre_div 0 0 120422400 0 0
sai1_div 0 0 24084480 0 0
sai1_root_clk 0 0 24084480 0 0

It appears as though the driver is trying to get to 24 MHz, but it can't because of the value of sai1_src. So then my question is, how do I set sai1_src? Clearly trying to set IMX8MM_AUDIO_PLL1 to 768 MHz didn't work.

Thanks!

Dave

Re: Setting SAI Clock Source

AldoG — Thu, 13 Jun 2019 17:59:56 GMT

Hello,

Please try modifying

drivers/clk/imx/clk-imx8mm.c

Find

static const struct imx_int_pll_rate_table imx8mm_audiopll_tbl[] = {

PLL_1443X_RATE(786432000U, 655, 5, 2, 23593),

PLL_1443X_RATE(722534400U, 301, 5, 1, 3670),

}

and modify the second line to

PLL_1443X_RATE(737280000U, 768, 24, 0, 0),

This should set the sai1_src to the value needed 768000000

Hope this helps,

Best regards,
Aldo.

topic Setting SAI Clock Source in i.MX Processors

Setting SAI Clock Source

Re: Setting SAI Clock Source