<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic  i.MX6 SPI CS in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-CS/m-p/965016#M143796</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello:&lt;/P&gt;&lt;P&gt;I am trying to interface a SPI peripheral (slave) to my i.MX6 (master).&amp;nbsp;&lt;/P&gt;&lt;P&gt;According to the timing diagram requirements of this SPI peripheral, the i.MX6 needs to send a 16-bit command first, and then receive 16-bit data from the peripheral. During this period, the CS needs to be kept low. I set the burst length to 16.&amp;nbsp;The CS will always be set high between the two bursts.&amp;nbsp;&lt;BR /&gt;How should I set the IMX6ul SPI to keep the CS signal line low between the two bursts?&amp;nbsp;Now no matter what I try to set it, I can't achieve it, eg (SMC = 0, SS_CTL = 0, XCH = 1).&lt;/P&gt;&lt;P&gt;Thanks!!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 10 Jul 2019 07:29:30 GMT</pubDate>
    <dc:creator>pan_liu2</dc:creator>
    <dc:date>2019-07-10T07:29:30Z</dc:date>
    <item>
      <title>i.MX6 SPI CS</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-CS/m-p/965016#M143796</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello:&lt;/P&gt;&lt;P&gt;I am trying to interface a SPI peripheral (slave) to my i.MX6 (master).&amp;nbsp;&lt;/P&gt;&lt;P&gt;According to the timing diagram requirements of this SPI peripheral, the i.MX6 needs to send a 16-bit command first, and then receive 16-bit data from the peripheral. During this period, the CS needs to be kept low. I set the burst length to 16.&amp;nbsp;The CS will always be set high between the two bursts.&amp;nbsp;&lt;BR /&gt;How should I set the IMX6ul SPI to keep the CS signal line low between the two bursts?&amp;nbsp;Now no matter what I try to set it, I can't achieve it, eg (SMC = 0, SS_CTL = 0, XCH = 1).&lt;/P&gt;&lt;P&gt;Thanks!!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Jul 2019 07:29:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-CS/m-p/965016#M143796</guid>
      <dc:creator>pan_liu2</dc:creator>
      <dc:date>2019-07-10T07:29:30Z</dc:date>
    </item>
    <item>
      <title>Re:  i.MX6 SPI CS</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-CS/m-p/965017#M143797</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You can try to change the CS pin as a GPIO pin. &lt;/P&gt;&lt;P&gt;Then use the gpio's output function to set the pin low.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Jul 2019 08:08:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-CS/m-p/965017#M143797</guid>
      <dc:creator>jimmychan</dc:creator>
      <dc:date>2019-07-10T08:08:45Z</dc:date>
    </item>
    <item>
      <title>Re:  i.MX6 SPI CS</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-CS/m-p/965018#M143798</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Is there a solution? I have a similar problem. Send one byte and receive 3 byte without CS going high between send and receive.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Michael&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2020 05:52:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-CS/m-p/965018#M143798</guid>
      <dc:creator>MicMoba</dc:creator>
      <dc:date>2020-02-14T05:52:57Z</dc:date>
    </item>
    <item>
      <title>Re:  i.MX6 SPI CS</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-CS/m-p/965019#M143799</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;solved my problem by using the cs-gpio property instead of cs-num in the DT. So the SPI driver manage the CS as GPIO and the cs_change property works. (Thanks to Sasch Hauer for support)&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;amp;ecspi1 {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp; status = "okay";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "fsl,imx53-ecspi";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp; &amp;nbsp;#size-cells = &amp;lt;0&amp;gt;;&amp;nbsp;&amp;nbsp; &amp;nbsp;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp; cs-gpios = &amp;lt;&amp;amp;gpio2 30 0&amp;gt;, &amp;lt;&amp;amp;gpio3 19 0&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-names = "default";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_generic_ecspi1&amp;gt;; &amp;nbsp;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp; fram: fram@0 {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "rohm,dh2228fv";&amp;nbsp; /* spidev -&amp;gt; cause buggy DT message */&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; reg = &amp;lt;0&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; spi-max-frequency = &amp;lt;34000000&amp;gt;; /* max 34MHz */&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp; };&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&lt;BR /&gt; };&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;pinctrl_generic_ecspi1: spi0grp {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; fsl,pins = &amp;lt;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_D18__ECSPI1_MOSI&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x0001B0B0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_D17__ECSPI1_MISO&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x0001B0B0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_D16__ECSPI1_SCLK&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x0001B0B0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_EB2__GPIO2_IO30&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x0001B0B0 &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_D19__GPIO3_IO19&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x0001B0B0 &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2020 09:44:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6-SPI-CS/m-p/965019#M143799</guid>
      <dc:creator>MicMoba</dc:creator>
      <dc:date>2020-02-14T09:44:55Z</dc:date>
    </item>
  </channel>
</rss>

