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    <title>i.MX Processors中的主题 Re: Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958635#M143152</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I think I misspoken. I would like imx to provide clocks, not the dsp module. So I think I had a mistake in txm-rxs there, it will be other way around. What do I need to do to set the clocks myself from devicetree? Just follow that PDF?&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 10 Aug 2019 14:00:46 GMT</pubDate>
    <dc:creator>mustafa_ozcelik</dc:creator>
    <dc:date>2019-08-10T14:00:46Z</dc:date>
    <item>
      <title>Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958633#M143150</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have been trying to bring up ESAI1 on iMX8QM platform for quite some time and could not seem to find or get any progressive information regarding that. I have connected a DSP board to I2S input of ESAI1 peripheral on iMX8QM, and would like to configure ESAI1 as I2S Master with 3.72MHz Bit Clock (BCK) and 48 kHz (32 bit frame, 24 bit data) on Word Sync (WS). I am working on 4.14.62 and connected DSP board to the following pins:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC_P_ESAI1_SCKR_AUD_ESAI1_SCKR &amp;lt;---------------------- WS&lt;BR /&gt;(iMX8QMMEK)&amp;nbsp; SC_P_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0 &amp;lt;------------- DATA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (Board with I2S Out)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC_P_ESAI1_FSR_AUD_ESAI1_FSR &amp;lt;--------------------------- BCK&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Following is what I have currently:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;fsl-imx8qm-device.dtsi&lt;BR /&gt;----------------------------------------------------&lt;/P&gt;&lt;P&gt;esai1: esai@59810000 {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;compatible = "fsl,imx8qm-esai";&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;reg = &amp;lt;0x0 0x59810000 0x0 0x10000&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;interrupts = &amp;lt;GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;clocks = &amp;lt;&amp;amp;clk IMX8QM_AUD_ESAI_1_IPG&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ESAI_1_EXTAL_IPG&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ESAI_1_IPG&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_CLK_DUMMY&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;clock-names = "core", "extal", "fsys", "spba";&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;dmas = &amp;lt;&amp;amp;edma3 6 0 1&amp;gt;, &amp;lt;&amp;amp;edma3 7 0 0&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;dma-names = "rx", "tx";&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;status = "disabled";&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;power-domains = &amp;lt;&amp;amp;pd_esai1&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;amp;esai1 {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;pinctrl-names = "default";&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_esai1&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;assigned-clocks = &amp;lt;&amp;amp;clk IMX8QM_ACM_ESAI1_MCLK_SEL&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_PLL0_DIV&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ESAI_1_EXTAL_IPG&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;assigned-clock-rates = &amp;lt;0&amp;gt;, &amp;lt;786432000&amp;gt;, &amp;lt;49152000&amp;gt;, &amp;lt;24576000&amp;gt;, &amp;lt;49152000&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;fsl,txm-rxs;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;fsl-imx8qm-mek.dtsi&lt;BR /&gt;----------------------------------------------------&lt;/P&gt;&lt;P&gt;pinctrl_esai1: esai1grp {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;fsl,pins = &amp;lt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;SC_P_ESAI1_FSR_AUD_ESAI1_FSR&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;0xc6000040&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;SC_P_ESAI1_FST_AUD_ESAI1_FST&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;0xc6000040&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;SC_P_ESAI1_SCKR_AUD_ESAI1_SCKR&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;0xc6000040&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;SC_P_ESAI1_SCKT_AUD_ESAI1_SCKT&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;0xc6000040&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;SC_P_ESAI1_TX0_AUD_ESAI1_TX0&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;0xc6000040&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;SC_P_ESAI1_TX1_AUD_ESAI1_TX1&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;0xc6000040&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;SC_P_ESAI1_TX2_RX3_AUD_ESAI1_TX2_RX3&amp;nbsp;&amp;nbsp; &amp;nbsp;0xc6000040&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;SC_P_ESAI1_TX3_RX2_AUD_ESAI1_TX3_RX2&amp;nbsp;&amp;nbsp; &amp;nbsp;0xc6000040&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;/*SC_P_ESAI1_TX4_RX1_AUD_ESAI1_TX4_RX1&amp;nbsp;&amp;nbsp; &amp;nbsp;0xc6000040*/ /* ??? Used already by another pin in board*/&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;SC_P_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0&amp;nbsp;&amp;nbsp; &amp;nbsp;0xc6000040&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;};&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would sincerely appreciate if someone from the community could explain how this peripheral&amp;nbsp; can be configured as I2S Master. There is already a driver existent fsl_esai.c, but there is no information on how this could be used for I2S Master configuration with specific clock rates and bit lengths... (I already have looked at ENHANCED SERIAL AUDIO INTERFACE (ESAI) Programming and Interfacing Techniques Application Note, there are some register configurations given, but there is no information how this could be done in the using the existent driver fsl_esai.c, Without re-inventing the wheel... )&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would really if anybody with prior experience could give me ideas how this could be done.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 07 Aug 2019 06:00:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958633#M143150</guid>
      <dc:creator>mustafa_ozcelik</dc:creator>
      <dc:date>2019-08-07T06:00:11Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958634#M143151</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mustafa&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SCKR is a bidirectional pin providing the receivers serial bit clock for the ESAI&lt;BR /&gt;interface. So DSP Bit Clock (BCK) should be connected to ESAI1_SCKR and&lt;BR /&gt;ESAI1_FSR to DSP WS. ESAI signals description (module is the same as in i.MX6Q)&lt;BR /&gt;can be found for example in &lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX6DQRM" target="_blank"&gt;&lt;STRONG&gt;i.MX 6Dual/6Quad Applications Processor Reference Manual&lt;/STRONG&gt;&lt;/A&gt;&lt;BR /&gt;Also when clocks provided from external codec to ESAI this is called "slave" mode.&lt;BR /&gt;i.MX8QM ESAI slave receiver configuration is defined by dts property "fsl,txm-rxs;" as in &lt;BR /&gt;fsl-imx8qm-mek.dtsi example:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;amp;esai0 {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;compatible = "fsl,imx8qm-esai";&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;pinctrl-names = "default";&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_esai0&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;assigned-clocks = &amp;lt;&amp;amp;clk IMX8QM_ACM_ESAI0_MCLK_SEL&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_PLL0_DIV&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ESAI_0_EXTAL_IPG&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;assigned-clock-rates = &amp;lt;0&amp;gt;, &amp;lt;786432000&amp;gt;, &amp;lt;49152000&amp;gt;, &amp;lt;12288000&amp;gt;, &amp;lt;49152000&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;fsl,txm-rxs;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi?h=imx_4.14.98_2.0.0_ga" title="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek.dtsi?h=imx_4.14.98_2.0.0_ga"&gt;fsl-imx8qm-mek.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is no clock tree for the i.MX8QM, System Control Unit (SCU) controls processor &lt;BR /&gt;resources, there are various clock slices that come off the PLLs that are contained in the &lt;BR /&gt;clocks subsystem of a particular module. &lt;BR /&gt;One can look at descriptions of "SC_PM_CLK_" in sect.13.4 (SVC) Power Management Service&lt;BR /&gt;System Controller Firmware API Reference Guide i.MX8QM sc_fw_api_qm_b0.pdf&lt;BR /&gt;inclided in &lt;A class="" href="https://www.nxp.com/webapp/sps/download/license.jsp?colCode=L4.14.98_2.0.0_SCFWKIT-1.2" target="_blank"&gt;SCFW Porting Kit&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 10 Aug 2019 09:30:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958634#M143151</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-08-10T09:30:04Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958635#M143152</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I think I misspoken. I would like imx to provide clocks, not the dsp module. So I think I had a mistake in txm-rxs there, it will be other way around. What do I need to do to set the clocks myself from devicetree? Just follow that PDF?&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 10 Aug 2019 14:00:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958635#M143152</guid>
      <dc:creator>mustafa_ozcelik</dc:creator>
      <dc:date>2019-08-10T14:00:46Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958636#M143153</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;for providing clocks from i.mx side "fsl,txs-rxm" should be used, one can look at esai driver sources:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/linux-imx/tree/sound/soc/fsl/fsl_esai.c?h=imx_4.14.98_2.0.0_ga" title="https://source.codeaurora.org/external/imx/linux-imx/tree/sound/soc/fsl/fsl_esai.c?h=imx_4.14.98_2.0.0_ga"&gt;fsl_esai.c\fsl\soc\sound - linux-imx - i.MX Linux kernel&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Aug 2019 01:55:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958636#M143153</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-08-12T01:55:55Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958637#M143154</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/igorpadykov"&gt;igorpadykov&lt;/A&gt;‌,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I just checked the connections and it seems I made a mistake when writing in the question,&lt;BR /&gt;So I have, &lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC_P_ESAI1_SCKR_AUD_ESAI1_SCKR &amp;lt;---------------------- BCK&lt;BR /&gt;(iMX8QMMEK)&amp;nbsp; SC_P_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0 &amp;lt;------------- DATA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (Board with I2S Out)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC_P_ESAI1_FSR_AUD_ESAI1_FSR &amp;lt;--------------------------- WS&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;at the moment and I entered fsl,txs-rxm; instead of fsl,txm-rxs; in the esai1 devicetree. &lt;BR /&gt;&lt;BR /&gt;&amp;amp;esai1 {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;pinctrl-names = "default";&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_esai1&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;assigned-clocks = &amp;lt;&amp;amp;clk IMX8QM_ACM_ESAI1_MCLK_SEL&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_PLL0_DIV&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV&amp;gt;,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;lt;&amp;amp;clk IMX8QM_AUD_ESAI_1_EXTAL_IPG&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;assigned-clock-rates = &amp;lt;0&amp;gt;, &amp;lt;786432000&amp;gt;, &amp;lt;49152000&amp;gt;, &amp;lt;24576000&amp;gt;, &amp;lt;49152000&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;fsl,txs-rxm;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;status = "okay";&lt;BR /&gt;};&lt;BR /&gt;&lt;BR /&gt;However, I am unable to see any movement in the BCK pin still. What do you think I should try next. Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Aug 2019 08:03:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958637#M143154</guid>
      <dc:creator>mustafa_ozcelik</dc:creator>
      <dc:date>2019-08-19T08:03:39Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958638#M143155</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Mustafa&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can look on some basic tests&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://source.codeaurora.org/external/imx/imx-test/tree/test/mxc_esai_test/doc?h=imx_4.14.98_2.0.0_ga" title="https://source.codeaurora.org/external/imx/imx-test/tree/test/mxc_esai_test/doc?h=imx_4.14.98_2.0.0_ga"&gt;doc\mxc_esai_test\test - imx-test - i.MX Driver Test Application Software&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Aug 2019 09:05:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958638#M143155</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-08-19T09:05:48Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958639#M143156</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, I think I am far from those tests. First I need ESAI being properly configured so that it provides clock to BCK, then comes the devicetree modifications so that ALSA recognises the DSP as a sound card. Then I can do those tests.&lt;BR /&gt;Could you please redirect me to someone with prior knowledge of this? Additional devicetree is as follows: simple-card.c gives error at parse_cpu and parse_codec. Regardless of that I would expect BCK pin to be clocked since I have set it to be rx-master.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;sound-dsp-module {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "simple-audio-card";&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; simple-audio-card,name = "DSP_Module";&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; simple-audio-card,format = "i2s";&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; simple-audio-card,bitclock-master = &amp;lt;&amp;amp;dailink_master&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; simple-audio-card,frame-master = &amp;lt;&amp;amp;dailink_master&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; status = "okay";&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; dailink_master: simple-audio-card,codec {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; sound-dai = &amp;lt;&amp;amp;codec_test&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; dailink_cpu: simple-audio-card,cpu {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; sound-dai = &amp;lt;&amp;amp;esai1&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; system-clock-frequency = &amp;lt;1536000&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; codec_test: codec_test {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; compatible = "linux,snd-soc-dummy";&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; #sound-dai-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; status="okay";&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Aug 2019 10:43:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958639#M143156</guid>
      <dc:creator>mustafa_ozcelik</dc:creator>
      <dc:date>2019-08-19T10:43:48Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958640#M143157</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;sorry, this part is not fully supported as it is "PREPRODUCTION" part&lt;/P&gt;&lt;P&gt;as shown below in red:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i.mx-applications-processors/i.mx-8-processors/i.mx-8-family-arm-cortex-a53-cortex-a72-virtualization-vision-3d-graphics-4k-video:i.MX8" title="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i.mx-applications-processors/i.mx-8-processors/i.mx-8-family-arm-cortex-a53-cortex-a72-virtualization-vision-3d-graphics-4k-video:i.MX8"&gt;i.MX 8 Family Applications Processor | Arm Cortex-A53/A72/M4 | NXP&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Full support may be provided using &lt;A class="link-titled" href="https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE" title="https://www.nxp.com/support/support/nxp-professional-services:PROFESSIONAL-SERVICE"&gt;NXP Professional Services | NXP&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Aug 2019 12:00:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958640#M143157</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2019-08-19T12:00:22Z</dc:date>
    </item>
    <item>
      <title>Re: Configuring ESAI1 as I2S Master with specific clock rates on iMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958641#M143158</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You can probably look at&amp;nbsp;&lt;STRONG&gt;fsl_esai_set_dai_sysclk&amp;nbsp;&lt;/STRONG&gt;function in fsl_esai.c. It has the direction of the&amp;nbsp;clocks passed as the parameter, and is responsible to set their frequencies as well.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Nov 2019 01:43:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Configuring-ESAI1-as-I2S-Master-with-specific-clock-rates-on/m-p/958641#M143158</guid>
      <dc:creator>ahota</dc:creator>
      <dc:date>2019-11-07T01:43:54Z</dc:date>
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