<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: What changes have to be made in the source while migrating from 1GB DDR SOM to 512 MB SOM? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958302#M143130</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Hello,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&amp;nbsp; use Chapter 3 (Porting U-Boot) of "i.MX_BSP_Porting_Guide.pdf".&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;In particular - section 3.2.1 (Changing the DCD table for i.MX DDR initialization).&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;A class="link-titled" href="https://www.nxp.com/webapp/Download?colCode=L4.14.78_1.0.0_LINUX_DOCS" title="https://www.nxp.com/webapp/Download?colCode=L4.14.78_1.0.0_LINUX_DOCS"&gt;https://www.nxp.com/webapp/Download?colCode=L4.14.78_1.0.0_LINUX_DOCS&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Have a great day,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Yuri&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;-------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Note:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 23 Sep 2019 08:16:16 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2019-09-23T08:16:16Z</dc:date>
    <item>
      <title>What changes have to be made in the source while migrating from 1GB DDR SOM to 512 MB SOM?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958301#M143129</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm using an imx6slevk board with yocto bsp with 1GB SOM.&amp;nbsp;&lt;/P&gt;&lt;P&gt;In a previous project I had used android kitkat with a 512 MB som now I wish to flash my yocto images to this board but the board freezes while flashing rootfs&lt;/P&gt;&lt;P&gt;I'm flashing using mfg tool into emmc.&lt;/P&gt;&lt;P&gt;Kernel and u-boot seem to flash without a problem but then there is no progress in rootfs.&lt;/P&gt;&lt;P&gt;I tried changing the dts file memory node in kernel&lt;/P&gt;&lt;P&gt;imx6sl-evk.dts&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;memory&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;reg = &amp;lt;0x80000000 0x40000000&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;to&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;memory {&lt;BR /&gt;reg = &amp;lt;0x80000000 0x20000000&amp;gt;;&lt;BR /&gt;&amp;nbsp;};&lt;/P&gt;&lt;P&gt;but there is no effect.&amp;nbsp;&lt;/P&gt;&lt;P&gt;What should I modify for this?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Sep 2019 06:45:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958301#M143129</guid>
      <dc:creator>sujay1</dc:creator>
      <dc:date>2019-09-23T06:45:37Z</dc:date>
    </item>
    <item>
      <title>Re: What changes have to be made in the source while migrating from 1GB DDR SOM to 512 MB SOM?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958302#M143130</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Hello,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&amp;nbsp; use Chapter 3 (Porting U-Boot) of "i.MX_BSP_Porting_Guide.pdf".&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;In particular - section 3.2.1 (Changing the DCD table for i.MX DDR initialization).&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;A class="link-titled" href="https://www.nxp.com/webapp/Download?colCode=L4.14.78_1.0.0_LINUX_DOCS" title="https://www.nxp.com/webapp/Download?colCode=L4.14.78_1.0.0_LINUX_DOCS"&gt;https://www.nxp.com/webapp/Download?colCode=L4.14.78_1.0.0_LINUX_DOCS&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Have a great day,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Yuri&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;-------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Note:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Sep 2019 08:16:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958302#M143130</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2019-09-23T08:16:16Z</dc:date>
    </item>
    <item>
      <title>Re: What changes have to be made in the source while migrating from 1GB DDR SOM to 512 MB SOM?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958303#M143131</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi yuri&lt;/P&gt;&lt;P&gt;These are the steps I did for ddr callibration.&lt;/P&gt;&lt;P&gt;1. Ran ddr test tool to get ddr_callibration(log is as below)&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;nbsp;MMDC registers updated from calibration &lt;BR /&gt; &lt;BR /&gt; Read calibration &lt;BR /&gt; MPRDDLCTL PHY0 (0x021b0848) = 0x4644484A &lt;BR /&gt; &lt;BR /&gt; Write calibration &lt;BR /&gt; MPWRDLCTL PHY0 (0x021b0850) = 0x3A363A30&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. changes in imximage.cfg file:&lt;BR /&gt; &lt;BR /&gt; DATA 4 0x021b0848 0x4646484a //changed to test for 512:old value 0x4241444a&lt;BR /&gt; DATA 4 0x021b0850 0x3a343a30 //changed to test for 512:old value 0x3030312b&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3. dts file in uboot and kernel&lt;/P&gt;&lt;P&gt;memory {&lt;BR /&gt; reg = &amp;lt;0x80000000 0x20000000&amp;gt;; //it was 0x40000000 changed for 512 Mb&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;4. Build (u-boot kernel rfs) and flash to device&lt;/P&gt;&lt;P&gt;Log while flashing:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;U-Boot 2017.03-imx_v2017.03_4.9.88_2.0.0_ga+ge88a4b5270 (Sep 23 2019 - 15:50:48 +0530)&lt;/P&gt;&lt;P&gt;CPU: Freescale i.MX6SL rev1.2 996 MHz (running at 792 MHz)&lt;BR /&gt;CPU: Commercial temperature grade (0C to 95C) at 49C&lt;BR /&gt;Reset cause: WDOG&lt;BR /&gt;Model: Freescale i.MX6 SoloLite EVK Board&lt;BR /&gt;Board: MX6SLEVK&lt;BR /&gt;DRAM: 1 GiB&lt;BR /&gt;Initializing for QP4720 bona 2P8 display&lt;BR /&gt;Initializing for bona 2P8 display&lt;BR /&gt;PMIC: PFUZE100! DEV_ID=0x10 REV_ID=0x21&lt;BR /&gt;MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2&lt;BR /&gt;gpio@020ac000: get_value: error: gpio GPIO5_0 not reserved&lt;BR /&gt;*** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;In: serial&lt;BR /&gt;Out: serial&lt;BR /&gt;Err: serial&lt;BR /&gt;Net: &lt;BR /&gt;Error: ethernet@02188000 address not set.&lt;BR /&gt;No ethernet found.&lt;BR /&gt;Boot from USB for mfgtools&lt;BR /&gt;Use default environment for mfgtools&lt;BR /&gt;Run bootcmd_mfg: run mfgtool_args;if test ${tee} = yes; then bootm ${tee_addr} ${initrd_addr} ${fdt_addr}; else bootz ${loadaddr} ${initrd_add;&lt;BR /&gt;Hit any key to stop autoboot: 0 &lt;BR /&gt;Kernel image @ 0x80800000 [ 0x000000 - 0x5edac0 ]&lt;BR /&gt;## Loading init Ramdisk from Legacy Image at 83800000 ...&lt;BR /&gt; Image Name: fsl-image-mfgtool-initramfs-imx6&lt;BR /&gt; Image Type: ARM Linux RAMDisk Image (gzip compressed)&lt;BR /&gt; Data Size: 8594034 Bytes = 8.2 MiB&lt;BR /&gt; Load Address: 00000000&lt;BR /&gt; Entry Point: 00000000&lt;BR /&gt; Verifying Checksum ... OK&lt;BR /&gt;## Flattened Device Tree blob at 83000000&lt;BR /&gt; Booting using the fdt blob at 0x83000000&lt;BR /&gt; Using Device Tree in place at 83000000, end 8300c538&lt;BR /&gt;switch to ldo_bypass mode!&lt;/P&gt;&lt;P&gt;Starting kernel ...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But the rootfs still doesn't flash it just hangs at kernel&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tried bitbake fsl-image-mfgtool-initramfs and it created a&amp;nbsp;&lt;/P&gt;&lt;P&gt;fsl-image-mfgtool-initramfs-imx6slevk-20190923104008.rootfs.cpio.gz.u-boot file&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;but even this doesn't help in flashing.&amp;nbsp;&lt;/P&gt;&lt;P&gt;am I missing something?&lt;/P&gt;&lt;H1 style="color: #646464; background-color: #ffffff; border: 0px; font-weight: 200; font-size: 2rem;"&gt;&lt;/H1&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Sep 2019 11:21:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958303#M143131</guid>
      <dc:creator>sujay1</dc:creator>
      <dc:date>2019-09-23T11:21:18Z</dc:date>
    </item>
    <item>
      <title>Re: What changes have to be made in the source while migrating from 1GB DDR SOM to 512 MB SOM?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958304#M143132</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; can You try to create boot SD card for i.MX6SL on Linux host?&lt;/P&gt;&lt;P&gt;It does not require MFG.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 24 Sep 2019 04:22:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958304#M143132</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2019-09-24T04:22:00Z</dc:date>
    </item>
    <item>
      <title>Re: What changes have to be made in the source while migrating from 1GB DDR SOM to 512 MB SOM?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958305#M143133</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri&lt;/P&gt;&lt;P&gt;It's a specific requirement to use mfg tool from the customer.. what can I do?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 24 Sep 2019 05:48:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958305#M143133</guid>
      <dc:creator>sujay1</dc:creator>
      <dc:date>2019-09-24T05:48:55Z</dc:date>
    </item>
    <item>
      <title>Re: What changes have to be made in the source while migrating from 1GB DDR SOM to 512 MB SOM?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958306#M143134</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;nbsp;At least it is needed to check if new memory settings are working.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~Yuri.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 24 Sep 2019 07:25:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/What-changes-have-to-be-made-in-the-source-while-migrating-from/m-p/958306#M143134</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2019-09-24T07:25:30Z</dc:date>
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