<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Reading Fuse in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219575#M14309</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please keep in mind, before any access to the register of one IP component, we need turn that IP component clock ON, otherwise, system bus will hang up and then system hang eventually.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 22 Oct 2012 07:27:35 GMT</pubDate>
    <dc:creator>JasonLiu</dc:creator>
    <dc:date>2012-10-22T07:27:35Z</dc:date>
    <item>
      <title>Reading Fuse</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219573#M14307</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;how can i read the iMX51 fuses inside a WEC700 driver?&lt;/P&gt;&lt;P&gt;I need to read the unique ID of the chip and my guess is that is contained in the fuses area.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My try is:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;UINT8* pRegs;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; int val;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; PHYSICAL_ADDRESS phyAddr;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ULONG ulSize = 0x840*sizeof(UINT8);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; phyAddr.QuadPart = CSP_BASE_REG_PA_IIM;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; pRegs = (UINT8*)MmMapIoSpace(phyAddr, ulSize, FALSE);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; RETAILMSG(1, (L":&amp;nbsp; %x\r\n", pRegs));&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; val&amp;nbsp; = INREG32(&amp;amp;pRegs[0x820]);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; RETAILMSG(1, (L":&amp;nbsp; %x\r\n", val));&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; val &amp;lt;&amp;lt;= 8;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; val |= INREG32(&amp;amp;pRegs[0x824]);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; RETAILMSG(1, (L":&amp;nbsp; %x\r\n", val));&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;but the driver hangs and the system stop to work.&lt;/P&gt;&lt;P&gt;How can i do it?&lt;/P&gt;&lt;P&gt;Thanks!&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Oct 2012 15:32:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219573#M14307</guid>
      <dc:creator>SteM</dc:creator>
      <dc:date>2012-10-16T15:32:46Z</dc:date>
    </item>
    <item>
      <title>Re: Reading Fuse</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219574#M14308</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I don't see any code to enable IIM clock in your driver, so you violate the basic rule in the driver. I believe that's the root cause for your hang (and this is a typical case for a driver hang).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please add following code before / after IIM access:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DDKClockSetGatingMode(DDK_CLOCK_GATE_INDEX_IIM, DDK_CLOCK_GATE_MODE_ENABLED_ALL);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ......&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DDKClockSetGatingMode(DDK_CLOCK_GATE_INDEX_IIM, DDK_CLOCK_GATE_MODE_DISABLED);&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Oct 2012 07:18:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219574#M14308</guid>
      <dc:creator>JerryZeng</dc:creator>
      <dc:date>2012-10-22T07:18:50Z</dc:date>
    </item>
    <item>
      <title>Re: Reading Fuse</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219575#M14309</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please keep in mind, before any access to the register of one IP component, we need turn that IP component clock ON, otherwise, system bus will hang up and then system hang eventually.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Oct 2012 07:27:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219575#M14309</guid>
      <dc:creator>JasonLiu</dc:creator>
      <dc:date>2012-10-22T07:27:35Z</dc:date>
    </item>
    <item>
      <title>Re: Reading Fuse</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219576#M14310</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes!&lt;/P&gt;&lt;P&gt;I added your code and it solved the problem.&lt;/P&gt;&lt;P&gt;Btw, I don't understand why there was no problem reading pRegs[0x20] and there was problem to read pRegs[0x820]...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Oct 2012 09:08:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219576#M14310</guid>
      <dc:creator>SteM</dc:creator>
      <dc:date>2012-10-22T09:08:11Z</dc:date>
    </item>
    <item>
      <title>Re: Reading Fuse</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219577#M14311</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;pRegs[0x20] is for IIM register and pRegs[0x820] is for eFuse, maybe IIM register access only need IPG clock and this clock is enabled by other driver. Just guess.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Oct 2012 10:50:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Reading-Fuse/m-p/219577#M14311</guid>
      <dc:creator>JerryZeng</dc:creator>
      <dc:date>2012-10-22T10:50:40Z</dc:date>
    </item>
  </channel>
</rss>

