topic Re: Shared ZQ resistor in i.MX Processors

Shared ZQ resistor

george — Mon, 05 Aug 2019 14:31:42 GMT

Dear OliverChen‌

How should we set Shared ZQ resistance in RPA when using LPDDR4 configured as shown below?

We do not share anything except Reset_n and RZQ in our schematics.

In such a case, should Shared ZQ resistor be DISABLED?

Best Regards,

George

Re: Shared ZQ resistor

oliver_chen — Tue, 06 Aug 2019 02:20:53 GMT

Hi george‌,

How many RANKs do you use? If you only use one-rank LPDDR4, you can set "Enalbe/DIsable Shared ZQ resistor" to DISABLED. If you use two-rank LPDDR4 but you have two ZQ resistors, you also set it to DIABLED. Otherwise, you should set it to ENABLED

B.R

Oliver

Re: Shared ZQ resistor

george — Tue, 06 Aug 2019 11:27:27 GMT

Hi OliverChen‌

Please tell me one last thing.

I may not yet correctly understand the RANK you say.

We use i.MX8M.

Should the "Shared ZQ resistor" be set to Enable when using the LPDDR4 shown in the figure above with the configuration in the table below?

Best Regards,

George

Re: Shared ZQ resistor

oliver_chen — Wed, 07 Aug 2019 01:56:25 GMT

Hi george‌,

I'm sorry the term of 'rank' confuses you. RANK used on DDR is chip select (CS).

"Shared ZQ resistor" can be either enabled or disabled in your configuration because there is only 1-rank (1-CS), but DISABLED is better.

B.R

Oliver

Re: Shared ZQ resistor

george — Thu, 08 Aug 2019 09:37:29 GMT

Dear OliverChen‌,

Thanks.