DDR Refreshing Rate

akashnair316 — Mon, 07 Oct 2019 12:36:49 GMT

Hi,

We are keeping i.MX6ULL based board at 85°C constant for 16 hours. At this point, we have kept a check at U-BOOT continuously monitoring the MPU core/junction temperature. Also, DDR's 1.35V & MPU's core voltages SOC_IN & High_IN are ON and all other rails are kept OFF. We observed that after some hours every supply gets down to 0V i.e. SOC_IN and HIGH_IN go to 0V, VSNVS is still 3V and PMIC_POWERON_REQ goes low. Hence the PMIC goes to power off mode.

On researching and analyzing some datasheet and reference manual we found that in the datasheet of DDR[MT41K128M16JT-125] it is mentioned that, If Tc exceeds 85°C, the DRAM must be refreshed manually at 2x refresh, which is a 3.9μsinterval refresh rate.

So,

Que 1: How to manually refresh DRAM at 2x? Since we are at U-Boot how to do it from U-BOOT?

Que 2: It is mentioned in Datasheet that on enabling ASR, DRAM's self-refresh rate is changed automatically from 1x to 2x. So How to enable it? Is there any register that we should access for changing this manually?

Que 3: Is it advisable to manually refresh it at 2x? Are there any other consequences if the refresh rate is doubled?

I have attached the snapshot from the DDR datasheet regarding the refresh rate.

Re: DDR Refreshing Rate

Yuri — Thu, 10 Oct 2019 08:02:18 GMT

Hello,

Please look at my comments below.

Look at section 35.12.9 [MMDC Core Refresh Control Register (MMDC_MDREF)] of i.MX 6ULL

Reference Manual, Rev. 1, 11/2017, regarding refresh control.

Mode Register 2 (MR2) contains bit ASR. MR registers usually configured during memory

initialization.

Yes, it is reasonable to double the refresh rate at high temperature.

Have a great day,

Yuri

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DDR Refreshing Rate

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