topic DDR Stress Tester in i.MX Processors

DDR Stress Tester

likangmao — Tue, 20 Aug 2019 08:02:08 GMT

您好！

我使用DDR Stress Tester Tool V3.0.0对开发板的DDR进行矫正测试，主芯片为IMX6DL，在进行DDR Calibration时，提示矫正失败，错误信息如下：

ARM Clock set to 1GHz

============================================
DDR configuration
BOOT_CFG3[5-4]: 0x00, Single DDR channel.
DDR type is DDR3
Data width: 64, bank num: 8
Row size: 15, col size: 10
Chip select CSD0 is used
Density per chip select: 2048MB
============================================

Current Temperature: 46
============================================

DDR Freq: 396 MHz

ddr_mr1=0x00000000
Start write leveling calibration...
running Write level HW calibration
MPWLHWERR register read out for factory diagnostics:
MPWLHWERR PHY0 = 0x78787878
MPWLHWERR PHY1 = 0x00000000

HW WL cal status: no suitable delay value found for byte 4

HW WL cal status: no suitable delay value found for byte 5

HW WL cal status: no suitable delay value found for byte 6

HW WL cal status: no suitable delay value found for byte 7
Write leveling calibration completed but failed, the following results were found:
MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x004C004D
MMDC_MPWLDECTRL1 ch0 (0x021b0810) = 0x00430043
MMDC_MPWLDECTRL0 ch1 (0x021b480c) = 0x001F001F
MMDC_MPWLDECTRL1 ch1 (0x021b4810) = 0x001F001F
Write DQS delay result:
Write DQS0 delay: 77/256 CK
Write DQS1 delay: 76/256 CK
Write DQS2 delay: 67/256 CK
Write DQS3 delay: 67/256 CK
Write DQS4 delay: 31/256 CK
Write DQS5 delay: 31/256 CK
Write DQS6 delay: 31/256 CK
Write DQS7 delay: 31/256 CK

WARNING: write-leveling calibration value is greater than 1/8 CK.
Per the reference manual, WALAT must be set to 1 in the register MDMISC(0x021B0018).
This has been performed automatically.
However, in addition to updating the calibration values in your DDR initialization,
it is also REQUIRED change the value of MDMISC in their DDR initialization as follows:

MMDC_MDMISC (0x021b0018) = 0x00011740

Error: failed during write leveling calibration

请教一下，这可能是什么原因导致的？谢谢

Re: DDR Stress Tester

likangmao — Tue, 20 Aug 2019 10:23:41 GMT

您好！

我后来又使用了DDR_Stress_Tester_V1.0.2, 测试后，产生的错误信息如下：

D:\likangmao\DDR_Stress_Tester_V1.0.2\Binary>DDR_Stress_Tester.exe -t mx6x -df s
cripts\\MX6_series_boards\\SabreSD\\RevC_and_RevB\\MX6DL\\MX6DL_SabreSD_DDR3_reg
ister_programming_aid_v1.5.inc
Open MX6x device failed! Please make sure board connected and in serial download
mode.

D:\likangmao\DDR_Stress_Tester_V1.0.2\Binary>DDR_Stress_Tester.exe -t mx6x -df s
cripts\\MX6_series_boards\\SabreSD\\RevC_and_RevB\\MX6DL\\MX6DL_SabreSD_DDR3_reg
ister_programming_aid_v1.5.inc
MX6DL opened.
HAB_TYPE: DEVELOP
Image loading...
download Image to IRAM OK

Re-open MX6x device.
Running DDR test..., press "ESC" key to exit.

******************************
DDR Stress Test (1.0.2) for MX6DL
Build: Dec 10 2013, 12:31:47
Freescale Semiconductor, Inc.
******************************

=======DDR configuration==========
BOOT_CFG3[5-4]: 0x00, Single DDR channel.
DDR type is DDR3
Data width: 64, bank num: 8
Row size: 14, col size: 10
Chip select CSD0 is used
Density per chip select: 1024MB
==================================

What ARM core speed would you like to run?
Type 0 for 650MHz, 1 for 800MHz, 2 for 1GHz
ARM set to 1GHz

Please select the DDR density per chip select (in bytes) on the board
Type 0 for 2GB; 1 for 1GB; 2 for 512MB; 3 for 256MB; 4 for 128MB; 5 for 64MB; 6
for 32MB
For maximum supported density (4GB), we can only access up to 3.75GB. Type 9 to
select this
DDR density selected (MB): 1024

Calibration will run at DDR frequency 400MHz. Type 'y' to continue.
If you want to run at other DDR frequency. Type 'n'
DDR Freq: 396 MHz

Would you like to run the write leveling calibration? (y/n)
Please enter the MR1 value on the initilization script
This will be re-programmed into MR1 after write leveling calibration
Enter as a 4-digit HEX value, example 0004, then hit enter
0004 You have entered: 0x0004
Start write leveling calibration
Write leveling calibration completed
MMDC_MPWLDECTRL0 ch0 after write level cal: 0x004E004F
MMDC_MPWLDECTRL1 ch0 after write level cal: 0x00450045
MMDC_MPWLDECTRL0 ch1 after write level cal: 0x001F001F
MMDC_MPWLDECTRL1 ch1 after write level cal: 0x001F001F

Would you like to run the DQS gating, read/write delay calibration? (y/n)
Starting DQS gating calibration...
. . . . . . . . . . . . . . ERROR FOUND, we can't get suitable value !!!!
dram test fails for all values.

The DDR stress test can run with an incrementing frequency or at a static freq
To run at a static freq, simply set the start freq and end freq to the same valu
e
Would you like to run the DDR Stress Test (y/n)?

Enter desired START freq (135 to 672 MHz), then hit enter.
Note: DDR3 minimum is ~333MHz, do not recommend to go too much below this.
333
The freq you entered was: 333

Enter desired END freq (135 to 672 MHz), then hit enter.
Make sure this is equal to or greater than start freq
400
The freq you entered was: 400

Beginning stress test

loop: 1
DDR Freq: 327 MHz
t0.1: data is addr test
Address of failure: 0x10000000
Data was: 0xfa7d00f8
But pattern should match address

为什么不同的测试工具产生的错误信息会不同呢？这个错误可能是什么原因导致的呢？谢谢！

Re: DDR Stress Tester

Rita_Wang — Fri, 06 Sep 2019 06:58:10 GMT

DDR Stress Test you can see the https://community.nxp.com/docs/DOC-105652