<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Question, i.MX8M minimum CPU clock in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943454#M141104</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your support.&lt;/P&gt;&lt;P&gt;Can I understand that CA53’s minimum frequency is 1.0GHz theoretically?&lt;/P&gt;&lt;P&gt;And CM4 cannot scale down from 266MHz.&lt;/P&gt;&lt;P&gt;Correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 19 Jul 2019 06:59:11 GMT</pubDate>
    <dc:creator>SLICE</dc:creator>
    <dc:date>2019-07-19T06:59:11Z</dc:date>
    <item>
      <title>Question, i.MX8M minimum CPU clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943450#M141100</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask about the minimum clock speed of i.MX8M.&lt;/P&gt;&lt;P&gt;Could you show me what is the minimum clock speed of i.MX8M(Cortex-A53 and Cortex-M4).&lt;/P&gt;&lt;P&gt;The customer wants to know what numbers are available to scale down dynamically.&lt;/P&gt;&lt;P&gt;They think it must be related to the DDR clock.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jul 2019 00:26:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943450#M141100</guid>
      <dc:creator>SLICE</dc:creator>
      <dc:date>2019-07-19T00:26:29Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX8M minimum CPU clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943451#M141101</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&amp;nbsp;Miyamoto,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;To check the maximum frequency:&lt;BR /&gt;cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_max_freq&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;To check the minimum frequency:&lt;BR /&gt;cat /sys/devices/system/cpu/*/cpufreq/cpuinfo_min_freq&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The system automatically adjusts DDR frequency for optimal performance based on the devices that are active.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jul 2019 00:52:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943451#M141101</guid>
      <dc:creator>peter_tian</dc:creator>
      <dc:date>2019-07-19T00:52:49Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX8M minimum CPU clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943452#M141102</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/pengtian"&gt;pengtian&lt;/A&gt;‌&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I executed the command you suggested on my 8M-EVK with L4.14.78-BSP.&lt;/P&gt;&lt;P&gt;And the messages are as below.&lt;/P&gt;&lt;P&gt;Max:&lt;/P&gt;&lt;P&gt;1500000&lt;/P&gt;&lt;P&gt;1500000&lt;/P&gt;&lt;P&gt;1500000&lt;/P&gt;&lt;P&gt;1500000&lt;/P&gt;&lt;P&gt;Min:&lt;/P&gt;&lt;P&gt;1000000&lt;/P&gt;&lt;P&gt;1000000&lt;/P&gt;&lt;P&gt;1000000&lt;/P&gt;&lt;P&gt;1000000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does those mean that the max speed of cortex-A53s are 1.5GHz?&lt;/P&gt;&lt;P&gt;And does those mean that the Min speed of cortex-A53s are 1.0GHz?&lt;/P&gt;&lt;P&gt;How about the min frequency of cortex-M4?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jul 2019 02:21:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943452#M141102</guid>
      <dc:creator>SLICE</dc:creator>
      <dc:date>2019-07-19T02:21:53Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX8M minimum CPU clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943453#M141103</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Miyamoto,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Yes. These values you got are&amp;nbsp;max_freq&amp;nbsp;(1.5GHz)&amp;nbsp;and min_freq (1.0GHz) on i.MX8MQ-EVK + L4.14.78-BSP.&lt;/P&gt;&lt;P&gt;CPU (Cortex-A53) frequencies can be scaled automatically between min_freq and max_freq depending on the system load.&lt;BR /&gt;The target frequency of Cortex-M4 platform is 266 MHz. And there is no frequency scale function for Cortex-M4 platform.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jul 2019 06:06:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943453#M141103</guid>
      <dc:creator>peter_tian</dc:creator>
      <dc:date>2019-07-19T06:06:37Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX8M minimum CPU clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943454#M141104</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your support.&lt;/P&gt;&lt;P&gt;Can I understand that CA53’s minimum frequency is 1.0GHz theoretically?&lt;/P&gt;&lt;P&gt;And CM4 cannot scale down from 266MHz.&lt;/P&gt;&lt;P&gt;Correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jul 2019 06:59:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943454#M141104</guid>
      <dc:creator>SLICE</dc:creator>
      <dc:date>2019-07-19T06:59:11Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX8M minimum CPU clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943455#M141105</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Miyamoto,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can get&amp;nbsp;the freq-points supported on current platform.&amp;nbsp; Release BSP doesn't support others frequencies except them. Can you understand it?&lt;/P&gt;&lt;P&gt;cat /sys/devices/system/cpu/*/cpufreq/scaling_available_governors&lt;/P&gt;&lt;P&gt;CM4 core is designed at the target of 266MHz.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jul 2019 07:46:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943455#M141105</guid>
      <dc:creator>peter_tian</dc:creator>
      <dc:date>2019-07-19T07:46:29Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX8M minimum CPU clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943456#M141106</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/pengtian"&gt;pengtian&lt;/A&gt;‌&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can I understand that min freq of CA53 is 1GHz and min freq of CM4 is 266MHZ?&lt;/P&gt;&lt;P&gt;We want to know the theoretical minimum freq of CA53 and CM4 to reduce power.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Jul 2019 09:10:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943456#M141106</guid>
      <dc:creator>SLICE</dc:creator>
      <dc:date>2019-07-19T09:10:48Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX8M minimum CPU clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943457#M141107</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Miyamoto,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is no limitation on the minimal frequency, any frequency below the target defined for the operating PVT should be supported. Customers also need&amp;nbsp;to balance overall system performance and power consumption. Thanks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jul 2019 01:10:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943457#M141107</guid>
      <dc:creator>peter_tian</dc:creator>
      <dc:date>2019-07-22T01:10:17Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX8M minimum CPU clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943458#M141108</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can I understand as below?&lt;/P&gt;&lt;P&gt;Theoretically, the minimum frequency of CA53 and CM4 is no limitation in the terms of chip.&lt;/P&gt;&lt;P&gt;But the customer need to develop their own device driver for down scaling the frequency when they use the other OS than your BSPs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Miyamoto&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jul 2019 01:29:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943458#M141108</guid>
      <dc:creator>SLICE</dc:creator>
      <dc:date>2019-07-22T01:29:01Z</dc:date>
    </item>
    <item>
      <title>Re: Question, i.MX8M minimum CPU clock</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943459#M141109</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Miyamoto,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Yes.&amp;nbsp;Customers&amp;nbsp;need&amp;nbsp;to&amp;nbsp;re-make&amp;nbsp;their&amp;nbsp;device&amp;nbsp;driver&amp;nbsp;to&amp;nbsp;down scaling&amp;nbsp;the&amp;nbsp;frequency which cannot be supported by NXP release BSP. Thanks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jul 2019 01:37:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Question-i-MX8M-minimum-CPU-clock/m-p/943459#M141109</guid>
      <dc:creator>peter_tian</dc:creator>
      <dc:date>2019-07-22T01:37:32Z</dc:date>
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