<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: Confirmed support for RAW12 through 4-lane CSI-2 sensor on i.MX8M?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933952#M139986</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I got RAW12 working using this (with&amp;nbsp;width = pix-&amp;gt;width) plus&amp;nbsp;enabling&amp;nbsp;the&amp;nbsp;fsl,two-8bit-sensor-mode in the device tree. Two 8 bit sensor mode is an awkward name for something that enables 16 bit data, which you need for RAW12. You'll get out 16 bit data padded with 4 zeroes.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 20 Jan 2020 20:14:58 GMT</pubDate>
    <dc:creator>t_spil</dc:creator>
    <dc:date>2020-01-20T20:14:58Z</dc:date>
    <item>
      <title>Confirmed support for RAW12 through 4-lane CSI-2 sensor on i.MX8M?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933945#M139979</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I've found a few forum posts describing attempts to bring up support for RAW12 on a 4-lane CSI2 sensor, has anyone had success in receiving 12-bit RAW data through 4-lane CSI2 sensor?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Comment regarding inability to bring up RAW12 in 4-lane configuration on i.MX8M :&amp;nbsp;&lt;A href="https://community.nxp.com/thread/498568"&gt;iMX8M MIPI-CSI 4-lane configuration&lt;/A&gt;&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Comment regarding lack of support for RAW12 on i.MX7D&amp;nbsp;&lt;A _jive_internal="true" class="link-titled" href="https://community.nxp.com/thread/474668#comment" title="https://community.nxp.com/thread/474668#comment-1081971"&gt;https://community.nxp.com/thread/474668#comment-1081971&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Comment regarding difficulty bringing up RAW12 on i.MX6D&amp;nbsp;&lt;A href="https://community.nxp.com/thread/323200"&gt;Mipi Csi-2: Capturing RAW12 Data correctly into Memory&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Comment showing&amp;nbsp;some success in getting RAW12 working on i.MX6&amp;nbsp;&lt;A href="https://community.nxp.com/thread/320618"&gt;i.MX6Q MIPI CSI2: Capturing RAW12 generic data&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Oct 2019 22:33:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933945#M139979</guid>
      <dc:creator>phahn</dc:creator>
      <dc:date>2019-10-17T22:33:33Z</dc:date>
    </item>
    <item>
      <title>Re: Confirmed support for RAW12 through 4-lane CSI-2 sensor on i.MX8M?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933946#M139980</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;MIPI CSI couldn't support raw data directly, you need to convert the raw data to RGB or YUV by SW, what bayer data you need? we don't have such sample code or guide for cutomer, but you can set the CSI register, for more detailed information, pls refer to the Reference Manual.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 30 Oct 2019 08:04:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933946#M139980</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2019-10-30T08:04:50Z</dc:date>
    </item>
    <item>
      <title>Re: Confirmed support for RAW12 through 4-lane CSI-2 sensor on i.MX8M?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933947#M139981</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I process bayer data using a separate SW pipeline.&amp;nbsp; My goal is only to capture and save 12-bit bayer data using i.MX8M.&amp;nbsp; There are forum posts confirming support for receiving 10-bit bayer but&amp;nbsp;it seems so far no one has confirmed success with receiving 12-bit bayer through 4-lane CSI sensor on i.MX8M (referred to as RAW12 in Reference Manual).&amp;nbsp; My main concern is this post here : &lt;A href="https://community.nxp.com/thread/498568" rel="nofollow noopener noreferrer" target="_blank"&gt;https://community.nxp.com/thread/498568&lt;/A&gt;&amp;nbsp;in which the user was unable to successfully receive 12-bit data in a 2- or 4-lane CSI configuration.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you confirm that RAW12 format is indeed supported in the latest i.MX8M firmware release for a 4-lane CSI sensor, and that the following source code changes are all that is required (based on 4.14.98_2.0.0 linux release):&lt;/P&gt;&lt;PRE&gt;&lt;P class=""&gt;diff --git a/drivers/media/platform/mxc/capture/mx6s_capture.c b/drivers/media/platform/mxc/capture/mx6s_capture.c&lt;/P&gt;&lt;P class=""&gt;index 9cfdbdc..99534ae 100644&lt;/P&gt;&lt;P class=""&gt;--- a/drivers/media/platform/mxc/capture/mx6s_capture.c&lt;/P&gt;&lt;P class=""&gt;+++ b/drivers/media/platform/mxc/capture/mx6s_capture.c&lt;/P&gt;&lt;P class=""&gt;@@ -138,6 +138,7 @@&lt;/P&gt;&lt;P class=""&gt;#define BIT_CSI_ENABLE &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;(0x1 &amp;lt;&amp;lt; 31)&lt;/P&gt;&lt;P class=""&gt;#define BIT_MIPI_DATA_FORMAT_RAW8&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;(0x2a &amp;lt;&amp;lt; 25)&lt;/P&gt;&lt;P class=""&gt;#define BIT_MIPI_DATA_FORMAT_RAW10 &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;(0x2b &amp;lt;&amp;lt; 25)&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;+#define BIT_MIPI_DATA_FORMAT_RAW12 &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; (0x2c &amp;lt;&amp;lt; 25)&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;#define BIT_MIPI_DATA_FORMAT_YUV422_8B (0x1e &amp;lt;&amp;lt; 25)&lt;/P&gt;&lt;P class=""&gt;#define BIT_MIPI_DATA_FORMAT_MASK&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;(0x3F &amp;lt;&amp;lt; 25)&lt;/P&gt;&lt;P class=""&gt;#define BIT_MIPI_DATA_FORMAT_OFFSET&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;25&lt;/P&gt;&lt;P class=""&gt;@@ -279,6 +280,18 @@ static struct mx6s_fmt formats[] = {&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.pixelformat&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= V4L2_PIX_FMT_SBGGR8,&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.mbus_code&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= MEDIA_BUS_FMT_SBGGR8_1X8,&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.bpp&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= 1,&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;}, {&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.name &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= "RAWRGB10 (SRGGB10)",&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.fourcc &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= V4L2_PIX_FMT_SRGGB10,&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.pixelformat&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= V4L2_PIX_FMT_SRGGB10,&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.mbus_code&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= MEDIA_BUS_FMT_SRGGB10_1X10,&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.bpp&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= 2,&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;}, {&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.name &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= "RAWRGB12 (SRGGB12)",&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.fourcc &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= V4L2_PIX_FMT_SRGGB12,&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.pixelformat&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= V4L2_PIX_FMT_SRGGB12,&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.mbus_code&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= MEDIA_BUS_FMT_SRGGB12_1X12,&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;.bpp&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;= 2,&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;}&lt;/P&gt;&lt;P class=""&gt;};&lt;/P&gt;&lt;P class=""&gt;&lt;/P&gt;&lt;P class=""&gt;@@ -861,6 +874,10 @@ static int mx6s_configure_csi(struct mx6s_csi_dev *csi_dev)&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;/* For parallel 8-bit sensor input */&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;width = pix-&amp;gt;width * 2;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;break;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;case V4L2_PIX_FMT_SRGGB10:&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+ &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;case V4L2_PIX_FMT_SRGGB12:&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;width = pix-&amp;gt;width * 2;&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;break;&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;default:&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;pr_debug(" &lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;case not supported\n");&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;return -EINVAL;&lt;/P&gt;&lt;P class=""&gt;@@ -885,6 +902,12 @@ static int mx6s_configure_csi(struct mx6s_csi_dev *csi_dev)&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;case V4L2_PIX_FMT_SBGGR8:&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;cr18 |= BIT_MIPI_DATA_FORMAT_RAW8;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;break;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;case V4L2_PIX_FMT_SRGGB10:&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;cr18 |= BIT_MIPI_DATA_FORMAT_RAW10;&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;break;&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;case V4L2_PIX_FMT_SRGGB12:&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;cr18 |= BIT_MIPI_DATA_FORMAT_RAW12;&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;STRONG&gt;+&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;break;&lt;/STRONG&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;default:&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;pr_debug(" &lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;fmt not supported\n");&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;return -EINVAL;&lt;/P&gt;&lt;P class=""&gt;&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;Thank you for your time&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 30 Oct 2019 17:35:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933947#M139981</guid>
      <dc:creator>phahn</dc:creator>
      <dc:date>2019-10-30T17:35:38Z</dc:date>
    </item>
    <item>
      <title>Re: Confirmed support for RAW12 through 4-lane CSI-2 sensor on i.MX8M?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933948#M139982</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;i.mx8M can support it, pls refer to the source code as below:&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;+&amp;nbsp;&amp;nbsp;.name&amp;nbsp;&amp;nbsp;= "RAWRGB12 (SGRBG12)",&lt;BR /&gt;+&amp;nbsp;&amp;nbsp;.fourcc&amp;nbsp;&amp;nbsp;= V4L2_PIX_FMT_SGRBG12,&lt;BR /&gt;+&amp;nbsp;&amp;nbsp;.pixelformat&amp;nbsp;= V4L2_PIX_FMT_SGRBG12,&lt;BR /&gt;+&amp;nbsp;&amp;nbsp;.mbus_code&amp;nbsp;= MEDIA_BUS_FMT_SRGGB12_1X12,&lt;BR /&gt;+&amp;nbsp;&amp;nbsp;.bpp&amp;nbsp;&amp;nbsp;= 1,&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;&amp;nbsp;switch (csi_dev-&amp;gt;fmt-&amp;gt;pixelformat) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;case V4L2_PIX_FMT_YUV32:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;case V4L2_PIX_FMT_SBGGR8:&lt;BR /&gt;+&amp;nbsp;case V4L2_PIX_FMT_SGRBG12:&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;width = pix-&amp;gt;width;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;break;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 31 Oct 2019 07:46:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933948#M139982</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2019-10-31T07:46:51Z</dc:date>
    </item>
    <item>
      <title>Re: Confirmed support for RAW12 through 4-lane CSI-2 sensor on i.MX8M?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933949#M139983</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Joan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you please tell me if "bpp" means "bytes per pixel" in this data structure?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; struct mx6s_fmt {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; char name[32];&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; u32 fourcc; /* v4l2 format id */&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; u32 pixelformat;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; u32 mbus_code;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; int bpp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the CSI driver mx6s_capture.c, "bpp" is used to calculate size of image:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;pix-&amp;gt;sizeimage = fmt-&amp;gt;bpp * pix-&amp;gt;height * pix-&amp;gt;width;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And if "bpp" means bytes per pixel, then&amp;nbsp;doesn't&amp;nbsp;RAWRGB12 use 2 bytes to represent a pixel ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Why "&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;bpp&amp;nbsp;&amp;nbsp;= 1" in the&amp;nbsp;&lt;/SPAN&gt;code you had showed?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope for your reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Nov 2019 10:55:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933949#M139983</guid>
      <dc:creator>felix_ye</dc:creator>
      <dc:date>2019-11-14T10:55:00Z</dc:date>
    </item>
    <item>
      <title>Re: Confirmed support for RAW12 through 4-lane CSI-2 sensor on i.MX8M?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933950#M139984</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;based on testing I've done I found it was necessary to set&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;+&amp;nbsp;&amp;nbsp;.bpp&amp;nbsp;&amp;nbsp;= 1,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;otherwise v4l2 will not output the expected image size, which makes sense given that we are expecting a 16bpp image at the output for RAW10 and RAW12 format.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The note about setting&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;width = pix-&amp;gt;width;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;seems to be correct based on i.MX8M Reference Manual but didn't make a difference in my output&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Nov 2019 18:37:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933950#M139984</guid>
      <dc:creator>phahn</dc:creator>
      <dc:date>2019-11-14T18:37:21Z</dc:date>
    </item>
    <item>
      <title>Re: Confirmed support for RAW12 through 4-lane CSI-2 sensor on i.MX8M?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933951#M139985</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;do you mean that whatever patch you use, you still get the same wrong video?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 Nov 2019 07:14:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933951#M139985</guid>
      <dc:creator>joanxie</dc:creator>
      <dc:date>2019-11-19T07:14:47Z</dc:date>
    </item>
    <item>
      <title>Re: Confirmed support for RAW12 through 4-lane CSI-2 sensor on i.MX8M?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933952#M139986</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I got RAW12 working using this (with&amp;nbsp;width = pix-&amp;gt;width) plus&amp;nbsp;enabling&amp;nbsp;the&amp;nbsp;fsl,two-8bit-sensor-mode in the device tree. Two 8 bit sensor mode is an awkward name for something that enables 16 bit data, which you need for RAW12. You'll get out 16 bit data padded with 4 zeroes.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Jan 2020 20:14:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933952#M139986</guid>
      <dc:creator>t_spil</dc:creator>
      <dc:date>2020-01-20T20:14:58Z</dc:date>
    </item>
    <item>
      <title>Re: Confirmed support for RAW12 through 4-lane CSI-2 sensor on i.MX8M?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933953#M139987</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;This was one of the best tip from this forum. I have been able to receive RAW10/12/14 data.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;James&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 08 Feb 2020 14:28:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Confirmed-support-for-RAW12-through-4-lane-CSI-2-sensor-on-i/m-p/933953#M139987</guid>
      <dc:creator>james_kim</dc:creator>
      <dc:date>2020-02-08T14:28:35Z</dc:date>
    </item>
  </channel>
</rss>

